These 8-bit flip-flops feature three-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing multiuser registers, I/O ports, bidirectional bus drivers, and working registers.
With the clock enable (
)
low, the eight D-type edge-triggered flip-flops enter data on the
low-to- high transitions of the clock. Taking high will disable the clock
buffer, thus latching the outputs. The ´ALS29825 has
noninverting D inputs and the ´ALS29826 has inverting D\ inputs.
Taking the 
input low
causes the eight Q outputs to go low independently of the clock.
Multiuser buffered output-control inputs (
1, 2, and 3)
can be used to place the eight outputs in either a normal logic state
(high or low level) or a high-impedance state. The outputs are also
in the high-impedance state during power-up and power-down
conditions. The outputs remain in the high-impedance state while the
device is powered-down. In the high-impedance state the outputs
neither load nor drive the bus lines significantly. The
high-impedance state and increased drive provide the capability to
drive the bus lines in a bus-organized system without need for
interface or pullup components. The output controls do not affect the
internal operation of the flip-flops. Old data can be retained or new
data can be entered while the outputs are in the high-impedance
state.
The SN54ALS29825 is characterized over the full military range of - 55°C to 125°C. The SN74ALS29825 and SN74ALS29826 are characterized for operation from 0°C to 70°C.