SN74ALS29841
10-BIT BUS-INTERFACE D-TYPE LATCH
WITH 3-STATE OUTPUTS
SDAS149A - JUNE 1988 - REVISED JANUARY 1995
features
- 3-State Buffer-Type Outputs Drive Bus Lines Directly
- Bus-Structured Pinout
- Provides Extra Bus-Driving Latches Necessary for Wider
Address/Data Paths or Buses With Parity
- Buffered Control Inputs Reduce dc Loading Effects
- Power-Up High-Impedance State
- Package Options Include Plastic Small-Outline (DW) Packages
and Standard Plastic (NT) 300-mil DIPs
description
This 10-bit latch features 3-state outputs designed specifically
for driving highly capacitive or relatively low-impedance loads. It
is particularly suitable for implementing buffer registers, I/O
ports, bidirectional bus drivers, and working registers.
The ten latches are transparent D-type latches. The SN74ALS29841
has noninverting data (D) inputs.
A buffered output-enable (
) input can place the ten outputs in either a normal
logic state (high or low logic levels) or in a high-impedance state.
The outputs also are in the high-impedance state during power-up and
power-down conditions. The outputs remain in the high-impedance state
while the device is powered down. In the high-impedance state, the
outputs neither load nor drive the bus lines significantly. The
high-impedance state and increased drive provide the capability to
drive bus lines without interface or pullup components.
does not affect
the internal operation of the latches. Old data can be retained or
new data can be entered while the outputs are off.
The SN74ALS29841 is characterized for operation from 0°C to
70°C.