SN74ALS29845, SN74ALS29846

8-BIT BUS INTERFACE D-TYPE LATCHES WITH 3-STATE OUTPUTS SDAS150 – D3118 — JUNE 1988

• 3-State Buffer-Type Outputs Drive Bus Lines Directly
• Bus-Structured Pinout
• Provides Extra Bus Driving Latches Necessary For Wider Address/Data Paths or Buses With Parity
• Buffered Control Inputs to Reduce DC Loading
• Power-Up High-Impedance State
• Package Options Include Plastic "Small Outline" Packages, Plastic Chip Carriers, and Standard Plastic 300-mil DIPs
• Dependable Texas Instruments Quality and Reliability

description

These 8-bit latches feature three-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.

The eight latches are transparent D-type. The ´ALS29845 has noninverting data (D) inputs. The ´ALS29846 has inverting D\ inputs. Since and are independent of the clock, taking the input low will cause the eight Q outputs to go low. Taking the input low will cause the eight Q outputs to go high. When both and are taken low, the outputs will follow the preset condition.

The buffered output control inputs (1, 2, and 3) can be used to place the eight outputs in either a normal logic state (high or low levels) or a high-impedance state. The outputs are also in the high-impedance state during power-up and power-down conditions. The outputs remain in the high-impedance state while the device is powered-down. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive the bus lines in a bus-organized system without need

for interface or pullup components. The output controls do not affect the internal operation of the latches. Old data can be retained or new data can be entered while the outputs are in the high-impedance state.

The SN74ALS29845 and SN74ALS29846 are characterized for operation from 0°C to 70°C