SDAS151A – D2910 — JUNE 1988 — REVISED JANUARY 1990
These 9-bit latches feature three-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.
The nine latches are transparent D-type. The ´ALS29843 has noninverting data (D) inputs. The ´ALS29844 has inverting D\ inputs.
A buffered output control (
) input can be used to place the nine outputs in either
a normal logic state (high or low levels) or a high-impedance state.
The outputs are also in the high-impedance state during power-up and
power-down conditions. The outputs remain in the high-impedance state
while the device is powered-down. In the high-impedance state, the
outputs neither load nor drive the bus lines significantly. The
high-impedance state and increased drive provide the capability to
drive the bus lines in a bus-organized system without need for
interface or pullup components.
The output control (
)
does not affect the internal operation of the latches. Old data can
be retained or new data can be entered while the outputs are off.
The SN54ALS29843 is characterized for operation over the full military range of - 55°C to 125°C. The SN74ALS29843 and SN74ALS29844 are characterized for operation from 0°C to 70°C.