SDAS154A - D2822, DECEMBER 1983 - REVISED JANUARY 1990
These four-line to one-line data selectors/multiplexers provide full binary decoding to select one-of-sixteen data sources with complementary Y and W outputs. The 'AS850A has a clock-controlled select register allowing for a symmetrical presentation of the select inputs to the decoder while the 'AS851B has an enable-controlled select register allowing the user to select and hold one particular data line.
A buffered group of output controls (G\,
, GW) can be used to place the two
outputs in either a normal logic (high or low logic level) or a
high-impedance state. In the high-impedance state, the outputs
neither load nor drive the bus lines significantly. The
high-impedance third state and increased drive provide the capability
to drive the bus lines in a bus-organized system without the need for
interface or pullup components.
The output controls do not affect the internal operations of the data selector/multiplexer. New data can be setup while the outputs are in the high-impedance state.
The SN74AS850A and SN74AS851B are characterized for operation from 0°C to 70°C.