)
input. The ´ALS165 have a clock-inhibit function and
complemented serial outputs.SDAS157B - JUNE 1982 - REVISED DECEMBER 1994
The ´ALS165 are parallel-load 8-bit serial shift registers
that, when clocked, shift the data toward serial (QH and
Q\H) outputs. Parallel-in access to each stage is provided
by eight individual direct data (A-H) inputs that are enabled by a
low level at the shift/load (SH/)
input. The ´ALS165 have a clock-inhibit function and
complemented serial outputs.
Clocking is accomplished by a low-to-high transition of the clock
(CLK) input while SH/ is held high
and the clock inhibit (CLK INH) input is held low. The functions of
CLK and CLK INH are interchangeable. Since a low CLK and a
low-to-high transition of CLK INH also accomplishes clocking, CLK INH
should be changed to the high level only while CLK is high. Parallel
loading is inhibited when SH/ is
held high. The parallel inputs to the register are enabled while
SH/ is low independently of the levels
of the CLK, CLK INH, or serial (SER) inputs.
The SN54ALS165 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ALS165 is characterized for operation from 0°C to 70°C.