SDAS218A - APRIL 1982 - REVISED DECEMBER 1994
These octal positive-edge-triggered flip-flops utilize TTL
circuitry to implement D-type flip-flop logic with a direct-clear
(
) input.
Information at the data (D) inputs meeting the setup-time requirements is transferred to the Q outputs on the positive-going edge of the clock (CLK) pulse. Clock triggering occurs at a particular voltage level and is not directly related to the transition time of the positive-going pulse. When CLK is at either the high or low level, the D input signal has no effect at the output.
The SN54ALS273 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ALS273 is characterized for operation from 0°C to 70°C.