SDAS222A - APRIL 1982 - REVISED DECEMBER 1994
This data selector/multiplexer contains inverters and drivers to
supply full binary decoding data selection to the AND-OR-invert
gates. Separate output-enable (
) inputs are provided for each of the two 4-line
sections.
The 3-state outputs can interface with and drive data lines of
bus-organized systems. With all but one of the common outputs
disabled (at the high-impedance state), the low impedance of the
single enabled output drives the bus line to a high or low logic
level. Each section has its own output enable. The output is disabled
when
is high.
The SN74ALS353B is characterized for operation from 0°C to 70°C.
Select inputs A and B are common to both sections.