SN54AS533, SN74AS533A
OCTAL TRANSPARENT D-TYPE LATCHES
WITH 3-STATE OUTPUTS

SDAS254A - APRIL 1982 - REVISED JUNE 1992

features

• 8 Latches in a Single Package
• 3-State Bus-Driving Inverting Outputs
• Full Parallel Access for Loading
• Buffered Output-Enable Inputs
• P-N-P Inputs Reduce DC Loading on Data Lines
• Package Options Include Plastic Small-Outline Packages, Ceramic Chip Carriers, and Standard Plastic and Ceramic 300-mil DIPs

description

These 8-bit D-type transparent latches feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.

While the latch-enable (LE) input is high, the Q\ outputs follow the complements of the data (D) inputs. When LE is taken low, the Q\ outputs are latched at the inverse level set up at the D inputs.

A buffered output-enable () input can be used to place the eight outputs in either a normal logic state (high or low logic level) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly.

The output-enable () input does not affect internal operations of the latch. Old data can be retained or new data can be entered while the outputs are in the high-impedance state.

The SN54AS533 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74AS533A is characterized for operation from 0°C to 70°C.