SN100KT5539
OCTAL ECL-TO-TTL TRANSLATOR
WITH OPEN-COLLECTOR OUTPUTS

SDZS008 - JANUARY 1990 - REVISED OCTOBER 1990

features

• 100K Compatible
• Open-Collector Outputs Drive Bus Lines or Buffer Memory Address Registers
• ECL and TTL Output-Enable Inputs
• Flow-Through Architecture Optimizes PCB Layout
• Center-Pin V_CC, V_EE, and GND Configurations Minimize High-Speed Switching Noise
• Package Options Include "Small Outline" Packages and Standard Plastic 300-mil DIPs

description

This octal ECL-to-TTL translator is designed to provide efficient translation between a 100K signal environment and a TTL signal environment. This device is designed specifically to improve the performance and density of ECL-to-TTL CPU/bus-oriented functions such as memory-address drivers, clock drivers, and bus-oriented receivers and transmitters while eliminating the need for three-state overlap protection.

Two pins 1 and 2 are provided for output-enable control. These control inputs are ANDed together with 1 being ECL-compatible and 2 being TTL-compatible. This offers the choice of controlling the outputs of the device from either a TTL or ECL signal environment.

The SN100KT5539 is characterized for operation from 0°C to 85°C.