SN10KHT5578
OCTAL TTL-TO-ECL TRANSLATOR WITH D-TYPE
EDGE-TRIGGERED FLIP-FLOPS AND OUTPUT ENABLE

SDZS014 – APRIL 1990

• 10KH Compatible
• TTL Clock and ECL Control Inputs
• Noninverting Outputs
• Flow-Through Architecture Optimizes PCB Layout
• Center Pin V _CC , V _EE , and GND Configurations Minimize High-Speed Switching Noise
• Package Options Include “Small Outline” Packages and Standard Plastic DIPs
• ESD Protection Exceeds 2000 V Per MIL-STD-883C, Method 3015

description

This octal TTL-to-ECL translator is designed to provide efficient translation between a TTL signal environment and a 10KH ECL signal environment. This device is designed specifically to improve the performance and density of TTL-to-ECL CPU/bus-oriented functions such as memory address drivers, clock drivers, and bus-oriented receivers and transmitters.

The eight flip-flops of the ’5578 are edge-triggered D-type flip-flops. On the positive transition of the clock, the Q outputs are set to the logic levels that were set up at the D inputs.

The output-control input does not affect the internal operations of the flip-flops. Old data can be retained or new data can be entered while the outputs are off.

The SN10KHT5578 is characterized for operation from 0°C to 75°C.