*************************************************************************** *************************************************************************** * Property of Texas Instruments Incorporated. Unauthorized * * reproduction and/or distribution is strictly prohibited. * * * * This product is protected under copyright law. * * Created 1995, (C) Copyright 1995, Texas Instruments Inc., * * All Rights Reserved * * * * UNLESS THERE IS A SIGNED, WRITTEN AGREEMENT TO THE * * CONTRARY, TEXAS INSTRUMENTS ("TI") IS PROVIDING THE SPICE * * MODELS "AS IS" AND WITHOUT ANY WARRANTY, EXPRESSED OR * * IMPLIED. TI assumes no liability for: * * 1) the accuracy of the SPICE models provided to your * * company; * * 2) the proper functioning of these SPICE models in your * * design or for any resulting applications; or * * 3) infringement of patents, copyrights or intellectual * * property rights resulting from your use of these * * SPICE models. * * * * TI provides SPICE Models as a service to our customers. * * You and your company shall not distribute, sell or give * * these models to anyone else without prior written * * permission from TI. * * * * TI reserves the right to make changes to our products or * * to discontinue any semiconductor product or service * * without notice, and advises our customers to obtain the * * latest version of relevant information to verify, before * * placing orders, that the information being relied on is * * current. * * * * Please be aware that your receipt and use of the SPICE * * information provided shall serve as acceptance of these * * terms and conditions. If you do not accept these terms, * * you should return or destroy the SPICE models and any * * other accompanying information immediately. * *************************************************************************** *************************************************************************** **LVT241 SPICE I/O Model **Advanced System Logic, Texas Instruments *************************************************************************** * *NOTE: * The following files must be present to use this SPICE model: * 241.LVT (netlist) * EPIC2B.LIB (Library file for process models) * EPIC2BN.13 (Nominal process models, CMOS Level 13) * EPIC2BS.13 (Strong process models, CMOS Level 13) * EPIC2BW.13 (Weak process models, CMOS Level 13) * EPIC2BN.3 (Nominal process models, CMOS Level 3) * EPIC2BS.3 (Strong process models, CMOS Level 3) * EPIC2BW.3 (Weak process models, CMOS Level 3) * PKGS.LIB (Library file for packages) * SOIC20.PKG (Package parasitics) * READ.ME (General use, release notes, ...) * *INSTRUCTIONS: * To use this SPICE model, include the following lines in your main netlist: * . * . * . * .INCLUDE '241.LVT' * XLVT241_IN 1 2 199 100 LVT241IN * XLVT241_OUT 4 5 6 199 100 LVT241OUT * . * . * . * * The diagrams below describe the nodes for the subcircuits: * * /|\ * ---- | * | \ | * Node 1 _______| \o___ Node 2 Node 199(VCC) * | / Node 100(GND) * | / | * ---- | * --- * LVT241IN(Input Buffer) - * * * | Node 6 /|\ * | | * O | * ---- Node 199(VCC) * / | Node 100(GND) * Node 5 ____o/ |___ Node 4 | * \ | | * \ | --- * ---- - * * LVT241OUT(Output Buffer) * * * Please refer to the 'READ.ME' file for general instructions for use. * * LVT241 SPICE I/O MODEL SUBCIRCUIT * ADVANCED BUS INTERFACE * ADVANCED SYSTEM LOGIC, TEXAS INSTRUMENTS * * MASTER:LVT240C * * SUBCIRCUITS: LVT241IN, LVT241OUT * * PACKAGE PARASITICS .LIB 'PKGS.LIB' SOIC20 * * PROCESS MODELS .LIB 'EPIC2B.LIB' NOMINAL_L13 * .LIB 'EPIC2B.LIB' STRONG_L13 * .LIB 'EPIC2B.LIB' WEAK_L13 * * LVT241 INPUT SUBCIRCUIT * NODES: INPUT NODE * | INTERNAL OUTPUT NODE * | | VCC * | | | GND * | | | | .SUBCKT LVT241IN 1 2 199 100 X_PKGIN 1 1001 SOIC20_11 X_PKGVCC 199 1199 SOIC20_20 X_PKGGND 100 1100 SOIC20_10 XLVT241IN 1001 2 1199 1100 LVT241__IN .ENDS LVT241IN * * LVT241 OUTPUT SUBCIRCUIT * NODES: INTERNAL INPUT NODE * | OUTPUT NODE * | | INTERNAL OE NODE * | | | VCC * | | | | GND * | | | | | .SUBCKT LVT241OUT 4 5 6 199 100 X_PKGOUT 5 1005 SOIC20_12 X_PKGVCC 199 1199 SOIC20_20 X_PKGGND 100 1100 SOIC20_10 XLVT241OUT 4 1005 6 1199 1100 LVT241__OUT .ENDS LVT241OUT * .SUBCKT LVT241__IN 501 502 599 500 XPINV 502 503 599 599 PM WP=400U LP=0.8U XP1 505 502 599 599 PM WP=6U LP=0.8U XNINV 502 503 500 500 NM WN=190U LN=0.8U XN2 506 502 500 500 NM WN=4U LN=1.8U QBRKDN 503 504 500 Q5_NPN 46 QESD 501 500 500 Q7_NPN 200 QD1 507 599 599 Q1_NPN 4 DS1 505 506 D1_GSD 150 RMT 501 503 45 R1 504 500 758 XRMOS 503 507 506 507 RMOS WR=6.5U RES=1K CBP 501 500 0.3P CL 502 500 0.8P .ENDS LVT241__IN * .SUBCKT LVT241__OUT 601 602 603 699 600 XP1 620 603 699 699 PM WP=50U LP=0.8U XP9 606 601 620 699 PM WP=50U LP=0.8U XP15 606 616 608 699 PM WP=30U LP=0.8U XN2 611 601 612 600 NM WN=300U LN=0.8U XN3 614 601 615 600 NM WN=250U LN=0.8U XN4 615 603 600 600 NM WN=30U LN=0.8U XN5 615 604 600 600 NM WN=30U LN=0.8U XN6 617 616 600 600 NM WN=100U LN=0.8U XN7 606 603 600 600 NM WN=30U LN=0.8U XN12 612 605 615 600 NM WN=300U LN=0.8U XN13 613 605 614 600 NM WN=250U LN=0.8U XN14 606 601 600 600 NM WN=30U LN=0.8U XN15 615 604 600 600 NM WN=100U LN=0.8U Q1 609 610 602 Q7_NPN 200 Q2 602 615 600 Q11_NPN 600 Q3 609 606 610 Q2_NPN 10 QD3 610 610 606 Q1_NPN 5 D1 699 609 D8_GSD 3344 D2 602 611 D3_GSD 300 D4 608 609 D1_GSD 150 R_ESD 602 617 25 XPDRN 670 670 600 600 NM WN=10U LN=0.8U DPDR 699 619 D1_GSD 150 XPDRR1 618 619 619 619 RMOS WR=6.5U RES=16.5K XPDRR2 670 618 618 618 RMOS WR=6.5U RES=7K XPP1 602 671 699 675 PM WP=1.5M LP=0.8U XPP2 671 604 673 675 PM WP=300U LP=0.8U XPP3 671 605 672 675 PM WP=150U LP=0.8U XPP6 602 699 671 675 PM WP=50U LP=0.8U XPP7 602 619 671 675 PM WP=10U LP=0.8U XPP8 602 699 675 675 PM WP=50U LP=0.8U XPP9 602 619 675 675 PM WP=10U LP=0.8U XPN4 671 605 674 600 NM WN=150U LN=0.8U XPN5 674 604 600 600 NM WN=150U LN=0.8U DP1 699 673 D3_GSD 300 DP2 699 672 D3_GSD 300 DP3 699 675 D1_GSD 150 XPDP10 676 603 699 699 PM WP=30U LP=0.8U XPDN15 679 679 680 600 NM WN=10U LN=0.8U XPDN16 680 618 682 600 NM WN=10U LN=0.8U XPDN17 681 679 613 600 NM WN=300U LN=0.8U XPDR1 613 681 681 681 RMOS WR=6.5U RES=4K XPDR2 681 699 699 699 RMOS WR=6.5U RES=200 XPDR3A 677 676 676 676 RMOS WR=6.5U RES=6K XPDR3B 678 676 677 676 RMOS WR=6.5U RES=7K XPDR3C 679 676 678 676 RMOS WR=6.5U RES=7K RPDM 682 602 100 XNORP1 616 603 683 699 PM WP=40U LP=0.8U XNORP2 683 604 699 699 PM WP=40U LP=0.8U XNORN1 616 603 600 600 NM WN=20U LN=0.8U XNORN2 616 604 600 600 NM WN=20U LN=0.8U DCL1 611 685 D1_GSD 150 DCL2 611 685 D1_GSD 150 DCL3 611 685 D1_GSD 150 DCL4 611 685 D1_GSD 150 DCL5 685 602 D1_GSD 150 DCL6 685 602 D1_GSD 150 DCL7 685 602 D1_GSD 150 DCL8 685 602 D1_GSD 150 XPINV1 604 601 699 699 PM WP=100U LP=0.8U XNINV1 604 601 600 600 NM WN=50U LN=0.8U XPINV2 605 603 699 699 PM WP=160U LP=0.8U XNINV2 605 603 600 600 NM WN=80U LN=0.8U CBP 602 600 0.3P .ENDS LVT241__OUT * LVT240F062595TS