TI DSPS 3rd Party Listings: Development Boards: HydraPlus

Digital Signal Processing Solutions Tools: Development Boards

Product Name:	HydraPlus
Company Name:	Ariel Corporation
Features & Benefits:	200 MFLOPS Harvard Architecture Up to 32 Mbytes private zero wait-state SRAM Shared memory up to 16 Mbytes DRAM or 12 Mbytes VMEbus master/slave capability Optional VSB master interface Flexible communication port configuration On-board JTAG controller ASIC
Platforms Supported:	VME
Host Platforms Supported:	Solaris SunOS, VxWorks
TMS320 Devices Supported:	C4x
CPU:	4
Clock Speeds Available (MHz):	50
Board Size:	Full Card
Memory (DRAM/SRAM):	SRAM
Expansion Options:
Software Included:
Technical Support/Training Available:	YES
Overview:	The new, advanced HydraPlus combines the 200MFLOPS performance of four C40s with VME master/slave capability, plus an optional VSB interface. With up to 32MBytes of private zero-wait-state SRAM in a Harvard Architecture, and up to 16MBytes of shared DRAM or 12 Mbytes of shared SRAM, HydraPlus is the ideal parallel processing workhorse, bringing the renowned Hydra Architecture to countless DSP applications.
Company Information:	Ariel Corporation 2540 Hwy 130 Cranbury NJ 08512 USA Tel: (609) 860-2900 Fax: (609) 860-1155 e-mail: steve.curtin@ariel.com www: http://www.ariel.com