Question: I am trying to understand the operation of the AIC on my TMS320C50 DSK. Specifically, it appears that the RESET pin of the AIC is connected to the BR\ pin of the TMS320C50. A sample program, "FUNC.ASM" that came with my DSK has a small section of code that causes BR\ to go low for one cycle and come back up after 10000 cycles. I have read the manual and experimented with modifying the sample program, but I still do not understand exactly what command effects the condition of BR\. Can someone please explain how this works ?

Answer: BR\ is the bus request signal and is used when making an access to global data memory. To use BR\, you have to map some of the data memory into global memory by setting a value in the GREG register, then you have to access data memory in that range. In the FUNC.asm this is performed with the following code: LACC #080h ; Pulse AIC reset by setting it low SACH DXR SACL GREG ; load 80 into the GREG reg mapping 8000-FFFF into global space LAR AR0,#0FFFFh RPT #10000 ; and taking it high after 10000 cycles LACC *,0,AR0 ; (.5ms at 50ns) this write is to global space, driving BR\ low SACH GREG ; re-map memory to local memory