Question:
Will / CAS (0:3) be asserted for 32-bit r/w cycles?
Answer: All / CAS lines will be
asserted during 'read' cycles for any bus size. In case of write, only those / CAS lines
that correspond to the data size is asserted. In your case, / CAS
(0:3) will be asserted for ' read ', but not for ' write '.
Device: TMS320C8x
Category: Related Devices
Detail: Memory Interfaces
Title: Will / CAS (0:3) be
asserted for 32-bit r/w cycles
Source: Case from TMS320 Hotline
Date: 8/1/97
GenId: 0008006