 Low Power Modes
The TMS320C3x CPU has been enhanced by the addition of
two power management modes, IDLE2 and LOPOWER.
Either mode is invoked by executing the corresponding
power-down instruction.
In IDLE2 power down mode (opcode = 06000001h),
the 'C3x behaves as follows:
- No instructions are executed. Device in stand-by
- Power Consumption 50µA with CLKIN shut off
- The CPU, peripherals, and internal memory will
retain their previous state.
- The external bus output pins are idle:
- address lines remain in their previous
state
- data lines are in the high impedance
state
- output control signals are inactive
- Clocks will stop with H1 high and H3 low, when
the device is in the functional (non-emulation)
mode.
- When the device is in emulation mode and
the IDLE2 instruction is executed,
the H1 and H3 clocks continue to operate
normally and the CPU behaves as if an IDLE
instruction had been executed. The clocks
continue to run for correct operation of
the emulator.
- Wake-up by external interrupt (/INT0-/INT3) is
asserted for at least two H1 cycles.
- When one of the four interrupts is
asserted, the clocks start after a delay
of one H1 cycle. The clocks can start up
in the phase opposite to that in which
they were stopped (i.e., H1 may start low
when H3 was low before stopping the
clocks and H3 may start low when H1 was
previously low). However, the H1 and H3
clocks will remain 180 degrees out of
phase with each other.
- To avoid generating multiple false
interrupts in level trigger mode, the
interrupt must be asserted for less than
three H1 cycles.
- The interrupt service routine must have been
setup before placing device in IDLE2 mode
since the instruction following the IDLE2
instruction will not be executed until the RETI
(return from interrupt) instruction is executed.
Note: For correct device
operation, the three instructions following a delayed
branch should not include either IDLE or IDLE2
instructions.
IDLE2 Timing
Interrupt response timing after
IDLE2 operation
In the LOPOWER (low power) mode, the 'C3x CPU
behaves as follows:
-
- CPU executes at CLKIN/16 rate
- For example, a TMS320C3x with a CLKIN
frequency of 32 MHz will perform the same as
a 2 MHz TMS320C3x, which has an instruction
cycle time of 1000 ns or 1 MHz).
- Power Consumption ~ 1/5 ICC
- MAXSPEED brings CPU to full speed
The TMS320C3x slows down to 1/16 of full speed
operation during the read phase of the LOPOWER
instruction. The TMS320C3x resumes full speed operation
during the read phase of the MAXSPEED instruction.
The LOPOWER instruction encoding (opcode) is
10800001h and the MAXSPEED instruction encoding is
10800000h.
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