Configurable Data Size

TMS320C32's external memory interface can load and store 8, 16, or 32 bit quantities into external memory and convert them into an internally equivalent 32 bit representation. The external memory interface accomplishes this added functionality without changing the CPU instruction set.

When connected to 32 bit memories, TMS320C32's program execution is identical to the TMS320C31. When connected to 16 bit zero wait state memory, the TMS320C32 takes two instruction cycles to fetch a single 32 bit instruction. During the first cycle, the TMS320C32 fetches the lower 16 bits. During the second cycle, the TMS320C32 fetches the upper 16 bits and concatenates them with the previously fetched lower 16 bits. This process occurs entirely within the memory interface and is transparent to the user. An external pin, PRGW, dictates the external program memory width.

Depending on the data size, the 'C32 changes the address presented on the 'C32 external address bus (physical address) in order to assign a particular address to each data word stored in external memory (logical address) . For example, consider a C32 connected to a 32-bit wide external memory that holds 8-bit data. To individually address each 8-bit data element stored in a single 32-bit wide memory location, the 'C32 assigns 4 address locations to each external memory location by dividing the internal address by four before presenting it to the external address bus. This behavior is governed by the following rules depending on the data size:

8-Bit Data Size For 8-bit data, the physical address is the internal (logical) address shifted down by 2.
16-Bit Data Size For 16-bit wide memory, the physical address is the internal (logical) address shifted down by 1.
32-Bit Data Size For 32-bit wide memory, the physical address is identical to the internal (logical) address.