Question: ...the logarithm can often be calculated in one cycle.. The customer told me that they have the same type of routine developed and that they can not get it to less than 10 cycles. He also pointed that he does not understand How will a one bit shift get rid of the 2's complement sign bit in the mantissa?. He states that the shift operation we have in the sample code won't get rid of the sign bit in the mantissa.

Answer: Suppose you are wanting to output the log data (dB scaling) of an FFT to a DAC that is then to be used to view the spectrum (or whatever) on an oscilloscope. Consider the snippet of code shown below where the log magnitude "dB" response of a point of an FFT would be calculated. Also note that "ScaleFactor" is essentially a gain that can be implemented externally in the DAC or oscilloscope gain circuit. Basically all that would be required would be to make sure the right data bit field is connected to the DAC.

 
New Method
   ||
  MagSquared=REAL^2 + IMAG^2;           /* Have to do this anyway       */
  *out=ScaleFactor*FastLog(MagSquared); /* use ASM inline for FastLog() */
   ||
 
Old method
   ||
  MagSquared=REAL^2 + IMAG^2;         /* Have to do this anyway      */
  *out=ScaleFactor*log(MagSquared);   /* log() takes lots of cycles! */
   ||

How FastLog() works
-------------------
If we look into the numeric representation of " MagSquared ", we will find for example that the sign bit is always 0 (positive) since we squared the REAL and IMAG values. The "exp" field is by definition in log2 form, so the only question is what to do with the mantissa bits. As it turns out, the fractional bits of the mantissa are an *exact* representation of the fractional part of the log2 representation of the number to about 3 bits of absolute accuracy, or 3.5 if you split the difference. This is about equivalent to a u-law or a-law format. Consider the logarithms of several mantissa values as shown below.

 
  Mantissa   Fractional  log2(Mantissa)  Error(in log2)  err*10*log10(2)
  1.000      0.000       0.000           0.000           0.000 dB
  1.250      0.250       0.322           0.072           0.216 dB
  1.500      0.500       0.585           0.085           0.255 dB
  1.750      0.750       0.807           0.057           0.171 dB
  1.999      0.999       0.999           0.000           0.000 dB
 
    log2 form    0   ???
   +-----------+---+--------------------------------+
   |    exp    | s |     fractional Mantissa        |
   +-----------+---+--------------------------------+
 
    ||
   ldf  @_MagSquared,R0;
   lsh  1,R0           ;  This is the only new line of code required!
   stf  R0,@DAC        ;
    ||
 

If you need to improve the accuracy, you have several choices. A traditional log calculation using a series expansion, a linear interpolation, or "square the mantissa" trick whereby you can use the Floating Point multiplier to extract more significant bits from the exponent field  ( see DNP 22 ). In addition to this neat little trick I have also found and am trying to patent a very simple method of improving the quality of sound. Hopefully this will show up in the next printing Details. The quality goes way beyond u-law a-law, yet the overhead is only 5-6 cycles for compress -or- decompress on a C31. For working examples of the "fast logarithm" please see the FFT applications for the C3x DSK. A semi-fast C callable function, plus the extended precision functions (mpy the mantissa trick) are also included. An example of the fast audio compress decompress patent is *not* included with any DSK software at this time.


Device: TMS320C3x
Category: Applications / Examples
Detail: Algorithms
Title: Fast Logarithms on a Floating-Point Device
Source: Case from the TMS320 Hotline
Date: 4/25/98
GenId: 30018

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