Indirect addressing encoding

Instructions may offer 16 or 8-bits (parallel instr.) for encoding of the indirect addressing. The encoding is as follows: 

  MSB                                                    LSB
   --------------------------------------------------------
  | mod field | ARn binary represent | displacement(if any)|
   --------------------------------------------------------
     5 bits         3 bits              rest of the bits
					  8 bits (for the 16-bit operand field)
		 (AR3= 11 )               0 bits (for the 8-bit operand field,
			 2                        in which case IRn registers
						  are used for indexing)