Question: Why the DSP needs to have one wait-state for the DARAM block at 0x1000-0x17FF since the memory is a dual access memory in SAM mode.

Answer: The DSP does NOT have to have 1 wait-state.

Rather, it will simply get held off for 1 clock cycle (automatically) due to both resources trying to access the memory block at the same time. This cycle hit comes automatically, the same way it would if you tried to perform a program and data read from an SARAM at the same time.

Remember, that while the memory is Dual-Access, it is still only single-port. and when the port is dedicated to the HPI interface, the C & D busses (DSP's data read busses) do not have access to that port.