CPU register modification

Modification of CPU registers can happens in 2 pipeline stages: * decode phase : the following registers get modified in this phase: 1. Auxiliary registers (ARn): ONLY during indirect addressing mode with pre or post increment WITH MODIFY (++ARn, --ARn, ARn++, ARn--). 2. Stack pointer register(SP): ONLY during PUSH/PUSHF/POP/POPF. A direct load of the SP (for example during LDI --,SP ..) takes place during the execution phase. 3. Any register used as destination when using the LDA instruction (refer to description of LDA in Chapter 11 of 1993 UG for details) 4. the ARn register used in the DBcond instruction.   * execute phase: any register that is the instruction destination operand.  


Device: TMS320C4x
Category: Device Information
Detail: Registers
Title: CPU register modification
Source: Case from the TMS320 Hotline
Date: 4/30/98
GenId: a3

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