TI TMS320C541 16-Bit 100-pin Fixed-Point DSP's with Boundary Scan
Supported Devices: TMS320C541PZ 100-pin Revision 2.x
-------------------------------------------------------------------------------
-- Created by : Texas Instruments Incorporated --
-- Documentation : TMS320C541 Users Guide --
-- BSDL revision : 1.10 - Modified CONTROL cell for DS,IS,PS,RW,MSTRB,IOSTRB--
-- 1.00 - Original --
-- BSDL status : Production --
-- Date created : 05/31/95 --
-------------------------------------------------------------------------------
-- --
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-- Copyright (c) 1995, Texas Instruments Incorporated --
-------------------------------------------------------------------------------
entity TMS320C541 is
generic (PHYSICAL_PIN_MAP : string := "PZ");
port (A : out bit_vector(0 to 15);
D : inout bit_vector(0 to 15);
INT_NEG : in bit_vector(0 to 3);
NMI_NEG : in bit;
IACK_NEG : out bit;
DX1 : out bit;
DX0 : out bit;
FSX1 : inout bit;
FSX0 : inout bit;
CLKX1 : inout bit;
CLKX0 : inout bit;
DR1 : in bit;
DR0 : in bit;
FSR1 : in bit;
FSR0 : in bit;
CLKR1 : in bit;
CLKR0 : in bit;
MP_MC_NEG : in bit;
BIO_NEG : in bit;
HOLD_NEG : in bit;
IAQ_NEG : out bit;
HOLDA_NEG : out bit;
XF : out bit;
MSC_NEG : out bit;
IOSTRB_NEG : out bit;
MSTRB_NEG : out bit;
R_W_NEG : out bit;
IS_NEG : out bit;
DS_NEG : out bit;
PS_NEG : out bit;
READY : in bit;
RS_NEG : in bit;
X2_CLKIN : in bit;
X1 : linkage bit;
CLKOUT : out bit;
EMU1_OFF_NEG : inout bit;
EMU0 : inout bit;
TOUT : out bit;
CNT : in bit;
CLKMOD : in bit_vector(1 to 3);
VDD:linkage bit_vector(1 to 9);
VSS:linkage bit_vector(1 to 11);
TCK:in bit;
TDI:in bit;
TDO:out bit;
TMS:in bit;
TRST_NEG:in bit);
use STD_1149_1_1990.all; -- Get standard attributes and definitions
use TI_BIDIR.all; -- Get C54X BIDIR cell attributes
----------------------------------------------------------------------
-- This package type TI_BIDIR must be available to your toolset. --
-- In most cases this text should be placed in a separate file --
-- named 'TI_BIDIR' that can be referenced via the previous --
-- 'use TI_BIDIR.all' statement. --
--
-- package TI_BIDIR is
-- use STD_1149_1_1990.all; -- Comment out for TI's ASSET tool
-- constant BC_BIDIR : CELL_INFO;
-- end TI_BIDIR;
--
-- package body TI_BIDIR is
-- constant BC_BIDIR : CELL_INFO :=
-- ((BIDIR_IN, EXTEST, PI), (BIDIR_OUT, EXTEST, PI),
-- (BIDIR_IN, SAMPLE, PI), (BIDIR_OUT, SAMPLE, PI),
-- (BIDIR_IN, INTEST, PI), (BIDIR_OUT, INTEST, PI));
-- end TI_BIDIR;
----------------------------------------------------------------------
attribute PIN_MAP of TMS320C541 : entity is PHYSICAL_PIN_MAP;
constant PZ : PIN_MAP_STRING :=
--Address and Data
" A:(91,92,93,94,95,96,97,98,99,100, " &
" 2,3,4,5,6,7), " &
" D:(70,71,72,73,74,75,77,78,79,80, " &
" 81,82,83,84,85,86), " &
--Control Signals
" DS_NEG:14, PS_NEG:13, IS_NEG:15, " &
" READY:12, R_W_NEG:16, " &
" MSTRB_NEG:17, IOSTRB_NEG:18, " &
" HOLD_NEG:23, HOLDA_NEG:21, " &
" IAQ_NEG:22, MSC_NEG:19, " &
--General Purpose I/O
" BIO_NEG:24, XF:20, " &
--Init., Interrupt and Reset
" IACK_NEG:43, CNT:54, " &
" NMI_NEG:44, INT_NEG:(45,46,47,48), " &
" RS_NEG:69, MP_MC_NEG:25, " &
--Ocillator Signals
" CLKOUT:66, CLKMOD:(51,52,53), " &
" X1:67, X2_CLKIN:68, " &
--Timer Signal
" TOUT:55, " &
--Serial Port's Signals
" CLKR0:27, CLKR1:28, " &
" CLKX0:33, CLKX1:34, " &
" DR0:31, DR1:32, " &
" DX0:41, DX1:42, " &
" FSR0:29, FSR1:30, " &
" FSX0:37, FSX1:38, " &
--JTAG Signals
" TCK:61, TDI:59, TDO:58, " &
" TMS:62, TRST_NEG:60, " &
--Test Signals
" EMU0:56, EMU1_OFF_NEG:57, " &
--Power and Ground
" VDD:(8,11,36,39,49,64,76,87,90), " &
" VSS:(1,9,10,26,35,40,50,63,65,88,89) " ;
attribute TAP_SCAN_IN of TDI : signal is true;
attribute TAP_SCAN_MODE of TMS : signal is true;
attribute TAP_SCAN_OUT of TDO : signal is true;
attribute TAP_SCAN_RESET of TRST_NEG : signal is true;
attribute TAP_SCAN_CLOCK of TCK : signal is (25.00e6, BOTH);
attribute INSTRUCTION_LENGTH of TMS320C541 : entity is 8;
attribute INSTRUCTION_OPCODE of TMS320C541 : entity is
"EXTEST (00000000), " &
"BYPASS (11111111), " &
"SAMPLE (00000010), " &
"HIGHZ (00000110), " &
"PRIVATE1 (00000001), " &
"PRIVATE2 (00000011), " &
"PRIVATE3 (00010000), " &
"PRIVATE4 (00010001), " &
"PRIVATE5 (00010010), " &
"PRIVATE6 (00010011), " &
"PRIVATE7 (00010100), " &
"PRIVATE8 (00010101), " &
"PRIVATE9 (00010110), " &
"PRIVATE10 (00010111), " &
"PRIVATE11 (00100000), " &
"PRIVATE12 (00100001), " &
"PRIVATE13 (00100010), " &
"PRIVATE14 (00100011), " &
"PRIVATE15 (00100100), " &
"PRIVATE16 (00100101), " &
"PRIVATE17 (00100110), " &
"PRIVATE18 (00100111), " &
"PRIVATE19 (00101000), " &
"PRIVATE20 (00101001), " &
"PRIVATE21 (00110000), " &
"PRIVATE22 (00110001), " &
"PRIVATE23 (00110010), " &
"PRIVATE24 (00110011), " &
"PRIVATE25 (00110100), " &
"PRIVATE26 (00110101), " &
"PRIVATE27 (00110110), " &
"PRIVATE28 (00110111) " ;
attribute INSTRUCTION_CAPTURE of TMS320C541 : entity is "XXXXXX01";
attribute INSTRUCTION_DISABLE of TMS320C541 : entity is "HIGHZ";
attribute INSTRUCTION_PRIVATE of TMS320C541 : entity is
"PRIVATE1, PRIVATE2, PRIVATE3, PRIVATE4, PRIVATE5, " &
"PRIVATE6, PRIVATE7, PRIVATE8, PRIVATE9, PRIVATE10, " &
"PRIVATE11, PRIVATE12, PRIVATE13, PRIVATE14, PRIVATE15, " &
"PRIVATE16, PRIVATE17, PRIVATE18, PRIVATE19, PRIVATE20, " &
"PRIVATE21, PRIVATE22, PRIVATE23, PRIVATE24, PRIVATE25, " &
"PRIVATE26, PRIVATE27, PRIVATE28 " ;
attribute REGISTER_ACCESS of TMS320C541 : entity is
"BOUNDARY (EXTEST, SAMPLE)," &
"BYPASS (BYPASS, HIGHZ) " ;
attribute BOUNDARY_CELLS of TMS320C541 : entity is
"BC_1, BC_2, BC_4, BC_BIDIR";
attribute BOUNDARY_LENGTH of TMS320C541 : entity is 85;
attribute BOUNDARY_REGISTER of TMS320C541 : entity is
"0 (BC_2 ,INT_NEG(3) ,INPUT ,X ), " &
"1 (BC_2 ,INT_NEG(2) ,INPUT ,X ), " &
"2 (BC_2 ,INT_NEG(1) ,INPUT ,X ), " &
"3 (BC_2 ,INT_NEG(0) ,INPUT ,X ), " &
"4 (BC_2 ,NMI_NEG ,INPUT ,X ), " &
"5 (BC_1 ,IACK_NEG ,OUTPUT3 ,X ,75 ,1 ,Z), " &
"6 (BC_1 ,DX1 ,OUTPUT3 ,X , 7 ,1 ,Z), " &
"7 (BC_1 ,* ,CONTROL ,1 ), " &
"8 (BC_1 ,DX0 ,OUTPUT3 ,X , 9 ,1 ,Z), " &
"9 (BC_1 ,* ,CONTROL ,1 ), " &
"10 (BC_BIDIR ,FSX1 ,BIDIR ,X ,11 ,1 ,Z), " &
"11 (BC_1 ,* ,CONTROL ,1 ), " &
"12 (BC_BIDIR ,FSX0 ,BIDIR ,X ,13 ,1 ,Z), " &
"13 (BC_1 ,* ,CONTROL ,1 ), " &
"14 (BC_BIDIR ,CLKX1 ,BIDIR ,X ,15 ,1 ,Z), " &
"15 (BC_1 ,* ,CONTROL ,1 ), " &
"16 (BC_BIDIR ,CLKX0 ,BIDIR ,X ,17 ,1 ,Z), " &
"17 (BC_1 ,* ,CONTROL ,1 ), " &
"18 (BC_2 ,DR1 ,INPUT ,X ), " &
"19 (BC_2 ,DR0 ,INPUT ,X ), " &
"20 (BC_2 ,FSR1 ,INPUT ,X ), " &
"21 (BC_2 ,FSR0 ,INPUT ,X ), " &
"22 (BC_2 ,CLKR1 ,INPUT ,X ), " &
"23 (BC_2 ,CLKR0 ,INPUT ,X ), " &
"24 (BC_2 ,MP_MC_NEG ,INPUT ,X ), " &
"25 (BC_2 ,BIO_NEG ,INPUT ,X ), " &
"26 (BC_2 ,HOLD_NEG ,INPUT ,X ), " &
"27 (BC_1 ,IAQ_NEG ,OUTPUT3 ,X ,75 ,1 ,Z), " &
"28 (BC_1 ,HOLDA_NEG ,OUTPUT3 ,X ,75 ,1 ,Z), " &
"29 (BC_1 ,XF ,OUTPUT3 ,X ,75 ,1 ,Z), " &
"30 (BC_1 ,MSC_NEG ,OUTPUT3 ,X ,75 ,1 ,Z), " &
"31 (BC_1 ,IOSTRB_NEG ,OUTPUT3 ,X ,38 ,1 ,Z), " &
"32 (BC_1 ,MSTRB_NEG ,OUTPUT3 ,X ,38 ,1 ,Z), " &
"33 (BC_1 ,R_W_NEG ,OUTPUT3 ,X ,38 ,1 ,Z), " &
"34 (BC_1 ,IS_NEG ,OUTPUT3 ,X ,38 ,1 ,Z), " &
"35 (BC_1 ,DS_NEG ,OUTPUT3 ,X ,38 ,1 ,Z), " &
"36 (BC_1 ,PS_NEG ,OUTPUT3 ,X ,38 ,1 ,Z), " &
"37 (BC_2 ,READY ,INPUT ,X ), " &
"38 (BC_1 ,* ,CONTROL ,1 ), " &
"39 (BC_1 ,A(15) ,OUTPUT3 ,X ,38 ,1 ,Z), " &
"40 (BC_1 ,A(14) ,OUTPUT3 ,X ,38 ,1 ,Z), " &
"41 (BC_1 ,A(13) ,OUTPUT3 ,X ,38 ,1 ,Z), " &
"42 (BC_1 ,A(12) ,OUTPUT3 ,X ,38 ,1 ,Z), " &
"43 (BC_1 ,A(11) ,OUTPUT3 ,X ,38 ,1 ,Z), " &
"44 (BC_1 ,A(10) ,OUTPUT3 ,X ,38 ,1 ,Z), " &
"45 (BC_1 ,A(9) ,OUTPUT3 ,X ,38 ,1 ,Z), " &
"46 (BC_1 ,A(8) ,OUTPUT3 ,X ,38 ,1 ,Z), " &
"47 (BC_1 ,A(7) ,OUTPUT3 ,X ,38 ,1 ,Z), " &
"48 (BC_1 ,A(6) ,OUTPUT3 ,X ,38 ,1 ,Z), " &
"49 (BC_1 ,A(5) ,OUTPUT3 ,X ,38 ,1 ,Z), " &
"50 (BC_1 ,A(4) ,OUTPUT3 ,X ,38 ,1 ,Z), " &
"51 (BC_1 ,A(3) ,OUTPUT3 ,X ,38 ,1 ,Z), " &
"52 (BC_1 ,A(2) ,OUTPUT3 ,X ,38 ,1 ,Z), " &
"53 (BC_1 ,A(1) ,OUTPUT3 ,X ,38 ,1 ,Z), " &
"54 (BC_1 ,A(0) ,OUTPUT3 ,X ,38 ,1 ,Z), " &
"55 (BC_1 ,* ,CONTROL ,1 ), " &
"56 (BC_BIDIR ,D(15) ,BIDIR ,X ,55 ,1 ,Z), " &
"57 (BC_BIDIR ,D(14) ,BIDIR ,X ,55 ,1 ,Z), " &
"58 (BC_BIDIR ,D(13) ,BIDIR ,X ,55 ,1 ,Z), " &
"59 (BC_BIDIR ,D(12) ,BIDIR ,X ,55 ,1 ,Z), " &
"60 (BC_BIDIR ,D(11) ,BIDIR ,X ,55 ,1 ,Z), " &
"61 (BC_BIDIR ,D(10) ,BIDIR ,X ,55 ,1 ,Z), " &
"62 (BC_BIDIR ,D(9) ,BIDIR ,X ,55 ,1 ,Z), " &
"63 (BC_BIDIR ,D(8) ,BIDIR ,X ,55 ,1 ,Z), " &
"64 (BC_BIDIR ,D(7) ,BIDIR ,X ,55 ,1 ,Z), " &
"65 (BC_BIDIR ,D(6) ,BIDIR ,X ,55 ,1 ,Z), " &
"66 (BC_BIDIR ,D(5) ,BIDIR ,X ,55 ,1 ,Z), " &
"67 (BC_BIDIR ,D(4) ,BIDIR ,X ,55 ,1 ,Z), " &
"68 (BC_BIDIR ,D(3) ,BIDIR ,X ,55 ,1 ,Z), " &
"69 (BC_BIDIR ,D(2) ,BIDIR ,X ,55 ,1 ,Z), " &
"70 (BC_BIDIR ,D(1) ,BIDIR ,X ,55 ,1 ,Z), " &
"71 (BC_BIDIR ,D(0) ,BIDIR ,X ,55 ,1 ,Z), " &
"72 (BC_2 ,RS_NEG ,INPUT ,X ), " &
"73 (BC_4 ,X2_CLKIN ,CLOCK ,X ), " &
"74 (BC_1 ,CLKOUT ,OUTPUT3 ,X ,75 ,1 ,Z), " &
"75 (BC_1 ,* ,CONTROL ,1 ), " &
"76 (BC_1 ,* ,CONTROL ,1 ), " &
"77 (BC_BIDIR ,EMU1_OFF_NEG,BIDIR ,X ,76 ,1 ,Z), " &
"78 (BC_BIDIR ,EMU0 ,BIDIR ,X ,80 ,1 ,Z), " &
"79 (BC_1 ,TOUT ,OUTPUT3 ,X ,75 ,1 ,Z), " &
"80 (BC_1 ,* ,CONTROL ,1 ), " &
"81 (BC_2 ,CNT ,INPUT ,X ), " &
"82 (BC_2 ,CLKMOD(3) ,INPUT ,X ), " &
"83 (BC_2 ,CLKMOD(2) ,INPUT ,X ), " &
"84 (BC_2 ,CLKMOD(1) ,INPUT ,X ) " ;
end TMS320C541;
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