GSM
IS-54B/IS-136
PDC
IS-95
Two new digital signal processors (DSPs) from TI lower power consumption and reduce chip count and system cost for wireless communications applications.
The new devices will enable the proliferation of enhanced features for wireless products such as data/fax capabilities, text messages, encryption, speech recognition, echo cancellation and noise suppression.
The TMS320C541 and TMS320C542 combine high performance, hard-wired functions with a specialized instruction set to implement worldwide digital cellular standards, including:
GSM
IS-54B/IS-136
PDC
IS-95
"Digital cellular means that carriers will be able to process more calls in one area, which reduces the amount of infrastructure equipment needed," said Gilles Delfassy, general manager of TI's worldwide wireless communications business unit. "TI's DSPs have enough processing power to implement a dual-mode phone, which means more carriers can begin building a more cost-effective digital infrastructure and pass the savings along to consumers. At the same time, end users will have phones that work in smaller communities where digital is not yet in place."
"These devices combine high performance, low power dissipation and cost effectiveness to enable phone designers to address a performance-hungry, price-sensitive and competitive market," said Thomas Brooks, TI's marketing manager for wireless communications. "We've taken TI's broad DSP expertise, listened to the wireless design engineer and designed the ideal device for wireless communications."
The TMS320C541 and TMS320C542 are designed for wireless communications terminals and base stations, respectively. Both DSPs provide advanced levels of performance and low power consumption at an effective cost. Operating at either 2.7 V or 5 V, the 'C54x DSPs are members of TI's Low-power Enhanced Architecture DSP (LEAD) family. TI announced the TMS320C54x DSP generation last year in Japan.
With three different power down modes, these devices are well-suited for wireless communications products such as digital cellular phones, personal digital assistants (PDAs) and wireless modems, all of which require power efficient components to extend battery life.
The DSPs feature 50 MIPS of processing power and have a hard-wired Viterbi accelerator that reduces Viterbi "butterfly update" down to only four instruction cycles for GSM channel decoding. The DSPs can easily implement all of the baseband digital signal processing functions in a single chip, with spare MIPs to perform other telephony tasks such as voice dialing, speaker phone and noise cancellation.
"The 'C54x DSPs use only an average of 12.7 of 50 available MIPS to implement full-rate GSM," said Delfassy. "The remaining MIPS allow many tasks traditionally handled by ASICs or microcon-trollers to be integrated onto the DSP, lowering overall system cost."
The reduction in the quantity and complexity of other system components also results in lower battery drain and reduced power consumption.
"We've diminished the amount of power consumed for the functionality achieved the number of milliwatts per function to a point well below any competing solution," said Delfassy.
Key 'C54x features are aimed at maximizing the DSPs' performance while enabling the low power implementation of wireless system functions such as voice coding and decoding.
"The 'C54x DSPs were designed to create a more efficient way of implementing CELP (Code Excited Linear Predictive coders) vocoders and other key digital communications functions," said Brooks. "The architecture makes it uniquely optimized for wireless communications applications-an accomplishment that clearly demonstrates TI's commitment to the wireless communications market."
If a customer needs even higher integration, TI can customize a device around the core, which enables reduced chip count, power dissipation and system cost. TI's customizable DSP (cDSP) technology allows the single-chip integration of the 'C54x DSP core with microcontroller cores, additional memory, peripherals and logic gates.
TI is licensing fully tested, full-rate GSM software modules that run on the 'C541 and 'C542 DSPs and comply with the European Telecommunications Standards Institute (ETSI) specifications. To support the fast-growing GSM market in Europe and Asia, these modules use the features of the optimized 'C54x DSPs to shorten time-to-market and enable efficient, cost-effective GSM applications.
TI's full-rate GSM modules perform voice coding and decoding, demodulation, encryption, channel coding and decoding, and other functions necessary for GSM systems, such as interrupt handling and control. The entire GSM code set occupies only 3,170 words of RAM and 11,496 words of ROM and requires an average of only 12.7 MIPS.
"These software modules are another example of TI's commitment to providing system-level solutions," said Delfassy. "Today's chip vendor cannot just supply DSPs, but instead must look at the big picture, from complementary ICs, to tools, to software and provide DSP solutions."
The 'C541, with 28K of ROM and 5K of RAM on-chip, is optimized for wireless terminals. The 'C542, optimized for wireless base stations, includes a host port interface and a buffered serial port and features 2K of ROM and 10K of RAM. Both devices are available directly from Texas Instruments only for high volume wireless communications applications.
May 1995, vol. 12, no. 4
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