July 1996, vol.13, no. 5 DSP news Wireless news Networking news Logic news TI news

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Next-generation packages are smallest in the industry for dual-in-line devices A new family of semiconductor packages developed by Texas Instruments requires approximately 40- to 60-percent less board space than a comp-arable, previous-generation SSOP (Shrink Small Outline Package) package. With the space savings enabled by Thin Very Small Outline Packages (TVSOP), designers of portable computer and communication systems will be able to design systems with improved performance and smaller in size. TVSOP packages feature a lead pitch of 0.4 mm and a device height that meets the 1.2-mm height restriction of the PCMCIA (Personal Computer Memory Card International Association) standard. The TVSOP family features packages with 14, 16, 20, 24, 48, 56, 80 and 100 pins. TVSOP packages with 14 to 56 pins exhibit lower inductance than TSSOP (Thin Small Shrink Outline Package) and SSOP packages. TI's Advanced Systems Logic group will be the first to make devices available in the new TVSOP package. These will include devices from TI's high performance 5-V (ABT and AHC) and 3.3-V (ALVC and LVC) logic families. TI will offer these packages for additional logic products in the near future. With the lower inductance of certain TVSOP packages, devices placed in these packages will achieve greater speeds and have improved performance. In addition, TVSOP packages use TI's multi-layer palladium lead-plating process which assures the most consistent performance with respect to solderability and manufacturability. TI is also using the most advanced manufacturing equipment to fabricate TVSOP packages. Sample devices in TVSOP packages are available now. For more information, a TVSOP application note is available from TI at http://www.ti.com/sc/docs/asl/lit/lit.htm.

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