TI announces plans for 100-MIPS DSP Texas Instruments  Integration Magazine

TI announces plans for 100-MIPS DSP

Texas Instruments has announced plans to achieve 100 million instructions per second (MIPS) in late 1996 on a 16-bit, fixed-point DSP. In addition, TI has disclosed development of a new low-voltage, 16-bit, fixed-point DSP with large on-chip static RAM to be introduced initially at 66 MIPS and subsequently offered at 100 MIPS.

These achievements will strengthen TI's leadership in digital signal processing solutions.

"TI is redefining the DSP landscape," said Mike Hames, vice president, Semiconductor Group and worldwide DSP manager. "TI plans to reach 100-MIPS performance first. The critical steps to do this include using a .25-micron quad-level metal process technology, a streamlined architecture and increased clock speeds."

At 100 MIPS, it becomes possible for systems to perform a variety of processing functions on a single chip that today have to be distributed.

For example, a 100-MIPS TMS320C54x DSP can handle multiple full-duplex channels of vocoding and echo cancellation within a digital cellular basestation, minimizing system cost, space and power. Another possibility is the integration of the numerous multimedia and telephony tasks onto a single 100-MIPS 'C54x DSP: V.34, digital simultaneous voice data (DSVD), full-duplex speaker-phone, FM and wavetable synthesis, 3-D sound and a variety of telephony algorithms.

TMS320LC548 for portables

The disclosed 16-bit, fixed-point DSP, the TMS320LC548, increases the available performance of large on-chip RAM DSPs with initial introduction at 66 MIPS and plans to migrate to 100 MIPS. It combines high-performance with low system power consumption, making it appealing for a variety of low-power, portable systems that can be brought to market quickly.

Typical applications include digital cellular base stations, wired and wireless telephones, mobile radios, personal digital assistants (PDAs), and high-end applications that merge digital telecommunications and networking, such as private branch exchanges (PBXs), T1/E1 line cards, and other multimedia and telephony systems with high-speed modem or Integrated Services Digital Networks (ISDN) capabilities.

Low-power expertise

"To develop the new 'LC548, we've leveraged our expertise in developing high-performance, low-power ICs for wireless telephones," said Jim Larimer, TI DSP fixed-point applications manager. "The same product strengths and technology that made other DSPs in the 'C54x family well-suited for the mobility and high processing requirements of wireless phones is used in the 'LC548 to support a wider variety of applications."

"The 'LC548 will offer twice the performance of the nearest competitive fixed-point DSP, opening up new possibilities in high-performance applications," said Ron Wages, TI's marketing manager for DSP products. "With its enhancements in manufac-turing process, architecture and functional integration, the 'LC548 shows how we plan to achieve 100 MIPS for 16-bit fixed-point digital signal processing within a year."

Sampling of the 66-MIPS version of the 'LC548 DSP is planned for early 3Q96, with volume production planned for 4Q96. The device will be available from TI and authorized distributors worldwide.

March 1996, vol. 13, no. 2

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