In This Issue
Leading the Digital Revolution
15 years of DSP
Memory
Mixed-Signal and Analog
Networking
Wireless
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With the introduction of the TMS320C6x fixed-point digital signal processor (DSP) family in early 1997, Texas Instruments gave notice it was once again redefining the DSP landscape. Now, TI is doing the same for floating-point DSP applications with the disclosure of the TMS320C67x DSP core -- the industry's first processor to cross into the 1-GFLOPS performance range. For system designers, this performance improvement of up to 10 times will enable applications requiring powerful analysis such as realistic virtual reality and next-generation medical imaging. Most important, 'C67x DSPs will make these powerful real-time applications an integral part of everyday life. The floating-point 'C67x will make possible a wide range of cost-effective, high-performance applications:
The new CPU core will support a new line of 32-bit, floating-point DSPs, the TMS320C67x generation, which complements and extends the ground-breaking advanced very-long instruction word (VLIW) VelociTI™ architecture already in use in TI's industry- leading TMS320C62x fixed-point DSPs. The 'C67x floating-point core can achieve 1 GFLOPS at 167 MHz today, and TI plans to triple 'C67x performance to 3 GFLOPS by the end of the decade. This performance will drastically reduce system chip count from as many as 10 DSP chips to one 'C67x. Because the 'C67x instruction set is a superset of the 'C62x, designers can use existing 'C6x tools to begin development of 'C67x floating-point systems. In 1Q98, TI plans to release a 'C6x tools set that will fully support floating-point instructions. This compatibility allows customers to meet time-to-market goals for advanced, next-generation floating-point applications. TI's VelociTI advanced very-long instruction word architecture is the foundation for the 'C67x core's incredible performance leap over competitive floating-point DSPs. This leapfrog technology uses an unprecedented combination of highly advanced hardware and the industry's most efficient C compiler that shifts the emphasis of design from hardware to software. The result is up to 10 times the performance of any other DSPs. This paradigm shift from hardware to software not only provides incredible performance but also cuts development time in half for DSP-based products. In addition, it also gives designers who may have little DSP experience access to this new technology. These developers can immediately take advantage of the power of the 'C67x by programming the devices in highly structured and architecture-independent C code. As the world's leading DSP solutions provider, TI currently has the largest number of floating-point customers worldwide and continues to encourage new designs using the 32-bit, floating-point TMS320C3x and TMS320C4x generations. For customers who need more performance, TI plans to offer translation tools from these existing architectures to the new 'C67x generation that will minimize rework and maximize 'C3x and 'C4x code investment. This 'C67x roadmap extends TI's DSP market leadership well into the next century.
Several leading DSP third-party companies will support the new 'C67x core. Sampling of the first 'C67x devices, manufactured in TI's 0.18-micron Timeline™ technology, is planned for the second half of 1998. For more information, visit the TI 'C67x website at VelociTI and Timeline are trademarks of Texas Instruments.
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Telescopes with the power to discover new worlds too tiny to see using current technology 
Classroom field trips to the Egyptian pyramids via virtual reality so children can experience an ancient civilization
3-D graphics and voice recognition for personal computer interfaces
Entertainment and training featuring object interaction -- movement, bounces and crashes -- mimicking the real world