MSP430x310 Family, Buglist and add. Informations
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| Ref-# | Comment |
| A4 | PUSH #4, PUSH #8
The single operand instruction does not utilize from the internal constant 4 and 8. But the other internal constants (0, 1, 2, -1) are used. The Assembler version 1.08 produces correct code - two words, the instruction PUSH and 0004 or 0008. Modification: not planned |
| E2 | EPROM, low-power and low-voltage
* Description: The EPROM control register at address 054h is accessed when the address 050h to 05Fh is used. When the SCG module (FLL) is accessed and the two LSB's are set, the EPROM starts programming and can not deliver data (instructions) until the EXE bit is reset. * Workaround: If one of the SCG control registers (050h, 051h, 052h) is modified the instructions that modifies this register(s) should be executed in the RAM. mov #data,050h clr &054h ret * Description: When a program is executing and this progam should write data into the EPROM the target address is latched incorrect: it is always 054h with the recommended sequence. The progamming via JTAG interface is not targetted. * Workaround: none. * Modification: The correct address is latched and the progamming of the EPROM while a program is executed is possible without restrictions |
| L3 | LCD analog levels are wrong or S29 is always switched to CMPI
* Description: A protection diode is switched from S29/O29/CMPI line to CPON bit line instead to VCC. This can causes the RS-FlipFlop, which controls to select S29/O29/CMPI to CMPI function, to switch to CMPI. Once the LCD signal or the O29 level becomes high via the diode the CPON bit line can be put to high level even if CPON bit should be low. S29/O29 signal >----o __ \o----*----<__> S29/O29/CMPI CMPI signal <----o | | +---+ \ / ===== | [CPON]* Workaround: (None). If S29/O29 is not used in the application there is no impact for any application. The software should have the instruction sequence CPON set/CPON reset eg. bis.b #40h,&04eh // bic.b #40h,&04eh to ensure CMPI is selected and LCD analog levels are correct. * Modification: Diode is clamped correctly to VCC. |
| O4 | Osc32, load capacitance
* Description: The capacitance is too high for exact frequency (too low). * Workaround: none. * Modification: Load capacitors are corrected. |
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J3
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JTAG, OTP and EPROM devices only
The input path of the TDI/VPP input is a standard CMOS buffer. Undefined levels there can cause additional current consumption from VCC to VSS via the gate. Workaround: add an external pull-down resistor that avoids floating node. Modification: The input buffer of the TDO/TDI input is modified to a gated input and no further ext. pull-down is needed in the application. |
| J4 | JTAG, OTP and EPROM devices only
The TDI driving (Vtdl_low) capability must be increased. The TDI driving (Vtdi_high) level has to be increased. The programming adapter MSP-PRG430B support it. The prog. adapter MSP-PRG430A can be modified to meet this conditions (see JTAGHINT.PDF description). |
| J5 | JTAG, OTP and EPROM devices only
The TDI driving (Vtdi_high) level has to be =>4.5V. |