Showcase

Analog Interface Circuits: a growing family

Analog Interface Circuits (AICs) from Texas Instruments, have become essential parts of many DSP-based systems and microcontroller-based systems which process analog signals and data. AICs provide high quality A/D and D/A conversions and eliminate or minimize the need for additional signal conditioning circuitry associated with the DSP or MCU serial interface.

The range of applications for AICs is extensive. They include:

Modems (V.32, V.32bis, V.FAST/V.34)
Industrial Process Control
PCMCIA Fax Modem
Acoustical Signal Processing
DSP Analog Interface
Noise Cancellation/Suppression
Echo Cancellation
Speech Processing
PC-Based Business Audio
PDA Voice Over Data

Earlier versions AICs used a successive approximation conversion technique. However, the sigma delta technique enables higher performance such as Signal-to-Noise Ratio (SNR) while simplifying the anti-aliasing filter required. This technique is now available in the TLC320AD55 (see previous article).

AICs consist of two data paths and two I/Os with appropriate support circuitry such as filters and references. The analog input/digital output data path filters and digitizes the signal before placing it on the serial I/O port. The digital input/analog output data path accepts processed digital data from the DSP serial port, converts it to analog, attenuates high frequency conversion noise, and presents the analog signal on the analog outputs.

SINC (sin x/x) correction can be accomplished within the DSP but it is also built into most of our AICs, providing design flexibility for optimization to special system requirements. It is a DSP-selectable option on the TLC32045, -46, and -47.

Loopback is a useful feature of some of our AIC family. AICs may have either or both analog and digital loopback. Loopback supports built in self testing.

AIC growth has paralleled the proliferation of DSPs. TI AICs are designed to simplify the interface to DSPs and MCUs.

Device Resolution Bandwidth Sample Master S/D* Power Modes SINC Power

(Bits) (Hz) Rate clock min (dB) Supply (sin x/x) Dissipation

(kHz) max (MHz) ADCIDAC (Volts) Correction max (mW)

TLC32040 14 300-3600 19.2 10.368 58/58 ą5 NA N 430

TLC32041 14 300-3600 19.2 10.368 58/58 ą5 NA N 430

TLC32044 14 100-3800 19.2 10.368 58/58 ą5 NA N 430

TLC32045 14 100-3800 19.2 10.368 55/55 ą5 Word, byte Y(opt.) 430

TLC32046 14 300-7200 25 10.368 58/58 ą5 1 Y (opt) 430

TLC32047 14 300-11400 25 10.368 56/58 ą5 1 Y(opt) 430

TLC320AC01 14 0-10800 25 15.0 66/68 +5 2 y 110

TLC320AC02 14 0-10800 25 15.0 68/68 +5 2 y 110

TLC320AD55 16 0-4000 10.3 16,384 1 +5 2 y 175

Device	Resolution	Bandwidth	Sample	Master	S/D*	Power	Modes	SINC	Power
	(Bits)	(Hz)	Rate	clock	min (dB)	Supply		(sin x/x)	Dissipation
			(kHz)	max (MHz)	ADCIDAC	(Volts)		Correction	max (mW)

TLC32040	14	300-3600	19.2	10.368	58/58	ą5	NA	N	430
TLC32041	14	300-3600	19.2	10.368	58/58	ą5	NA	N	430
TLC32044	14	100-3800	19.2	10.368	58/58	ą5	NA	N	430
TLC32045	14	100-3800	19.2	10.368	55/55	ą5	Word, byte	Y(opt.)	430
TLC32046	14	300-7200	25	10.368	58/58	ą5	1	Y (opt)	430
TLC32047	14	300-11400	25	10.368	56/58	ą5	1	Y(opt)	430
TLC320AC01	14	0-10800	25	15.0	66/68	+5	2	y	110
TLC320AC02	14	0-10800	25	15.0	68/68	+5	2	y	110
TLC320AD55	16	0-4000	10.3	16,384	1	+5	2	y	175

1= Dual word, byte
2 = Stand-alone, master-slave, linear codec
* SID = Signal-to-distortion ratio

Vol 13, September, 1995

Return to Showcase Home Page