The TLV5621 is a low power quad 8-bit DAC with a settling time of 10 µs, capable of operating down to 2.7 V. The device consists of three standard 8-bit DACs and one 8-bit half-power DAC. The half-power DAC consumes 250 µA max (150 µA typ) at a settling speed of 20 µs. The other three DACs each consume 500 µA, at a settling speed of 40 µs. The TLV5621 can either be quickly brought to power down state by a global hardware power down or each DAC can be individually shut down via software, offering very flexible power down options. The device consumes less than 1.5 mA in operation and less then 100 µA in power down mode making the TLV5621 ideal for power-sensitive applications.
TLV5621 provides a flexible serial interface. The double buffered mode makes it possible to update all DAC outputs simultaneously. When operating in the single buffered mode it can interface to a microprocessor with a simple two-wire interface. Its programmable output gain gives you a choice of 1X or 2X output.
Applications range from mobile communication to programmable voltage sources, digitally-controlled amplifiers, automatic test equipments, process monitoring and signal synthesis. The TLV5621 is available in 14-pin DIP (TLV5621EN) or SOIC (TLV5621ED) packages.
Vol 17, June, 1996
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