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HOUSTON (July 24, 1995) -- Texas Instruments has introduced two low-voltage, 16-megabit (Mbit) synchronous dynamic random access memory (SDRAM) devices into volume production. These JEDEC-standard devices are organized x4 and x8 and operate at 66 and 83 MHz to close the gap between processor performance and memory bandwidth in computer systems, providing a long-term solution to the memory bandwidth bottleneck.
"The release of these two devices to production reflects TI's continuing leadership in the drive to solve the memory bandwidth problem found in many systems today," said Bob Harrison, TI's MOS memory marketing manager." SDRAMs provide an evolutionary approach to achieving greater memory bandwidth. We expect them to become the standard memory architecture within the next few years, and as the need for greater memory bandwidth migrates to the PC environment, TI will be ready with a device packaged to meet that industry's requirements."
Current production 16-Mbit SDRAM devices operate at 3.3 volts and include 66 and 83 MHz versions, with 100 MHz versions expected later this year. The x4 and x8 devices, the TMS626402 and TMS626802 respectively, meet the requirements of high-performance computers and workstation, fitting easily into existing designs. The 1Mx16 devices, optimized for PC environments, are now in development with planned availability later this year.
Siemens Nixdorf Informationssysteme (SNI) AG decided to use TI's SDRAM as main memory in its new generation of mid-range servers. Mr. Georg Mueller, SNI Engineering Development Manager, said, "Server users need fast access to large amounts of data. To meet this need, SNI's next generation of high-performance workgroup and departmental servers will rely on high-speed SDRAMs to provide access to more than 1 GigaByte of main memory. A combination of speed and cost effectiveness makes SDRAM the optimum solution in this application and also makes SDRAM the solution of choice for future systems." SNI also has plans to develop PC and mainframe systems that have flow-through architecture based on the SDRAM.
Synchronous DRAMs address the higher clock speeds of emerging microprocessors, enabling faster memory operation with burst data rates of up to four times that of standard page mode DRAMs. By using SDRAM devices for main memory, designers can reduce or eliminate microprocessor wait states without relying on expensive external cache. Synchronizing all control, address, and data signals to a single system clock simplifies system and memory controller design and enhances performance. Long-term, SDRAMs offer designers a two-fold advantage: (1) a roadmap to meet the performance requirements of future microprocessors and (2)a smooth transition to higher bus speeds without the requirement of redesigning systems to accommodate a new architecture.
Applications for SDRAMs include main memory for high-performance workstations and PCs, high-end graphics, secondary cache displacement, digital set-top boxes, videoconferencing, hard disk drive data buffers, and high-bandwidth buffers for data transmission and communications.
According to Harrison, "SDRAMs combine recent industry advances in fast DRAM architecture with high-speed interface and miniature packaging technologies to provide a standard, non-proprietary, widely sourced device. Most major memory suppliers support the JEDEC standard SDRAM."
The TMS626402 and TMS626802 16-Mbit SDRAMs are available now direct from Texas Instruments. Planned suggested resale pricing of the devices is $90 each in quantities of more than 100. The x4 and x8 versions are available in JEDEC-standard 44-pin thin small outline packages (TSOPs).
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