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1394 High Performance Serial Bus Mixed-Signal & Analog Products
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New 1394 Link Layer Chips from TI are Optimized for 400 Mbps PerformanceFirst to Support Next Generation of 1394 Specification
The four new 1394 link layer interface devices are designated as follows: GP2Lynx (TSB12LV32) for general purpose PC and peripheral equipment applications; PCILynx2 (TSB12LV21B) which will be used in PCI bus-to-1394 applications; TSB12LV01 for high-end networking equipment; and DVLynx TSB12LV42) which is targeted at consumer electronics products involving digital video. "These four link layer chips add to our already extensive family of 1394 interface devices, which includes both link layer and physical layer (PHY) chips," said Randy Trost, TI's worldwide marketing manager for 1394 products. "We have added or enhanced certain features, such as larger on-chip first-in, first-out (FIFO) memory which assures efficient operations at higher speeds and better support for asynchronous data transmissions." PC Applications The GP2Lynx and PCILynx2 devices are the first 1394 link layer devices in the industry to fully comply with the newest version of the 1394 specification, P1394.a, which includes several improvements specifically for PC applications, like power management features, arbitration enhancements and bandwidth optimization capabilities. Additionally, both devices support 1394 communication speeds of 400, 200 and 100 Mbps. The GP2Lynx features a large 4K-byte FIFO (2K for transmit and 2K for receive), which may eliminate the need for external memory in some applications for asynchronous transmissions. Previous versions of this chip had only a 200 byte FIFO. A new datamover port on the device makes it possible to perform both asynchronous and isochronous transmissions. Real-time applications like video or audio usually use 1394's isochronous communications mode, which can guarantee bandwidth for an application. The GP2Lynx comes in the same 100-pin package as the previous generation GPLynx device (TSB12LV31PZ). For developing embedded applications, the GP2Lynx will be fully supported with software such as the Hardware Abstraction Layer (HAL). PCILynx2 has a 4K FIFO that is four times larger than the previous generation device. It is capable of 400 Mbps data transfer speeds and is intended for any system with a PCI bus, including PCs, printers, multi-function peripherals and system backplanes. Native Microsoft Windows® 98 drivers, which are backwards compatible with the first-generation PCILynx, are available. The PCILynx2 will be easy for developers to design into new products and it should shorten development cycles because the chip is a drop-in replacement for the current PCILynx device and it is fully software compatible. High-end Networking The TSB12LV01 is well suited for high-end networking and computing systems because of its 32-bit host controller interface and a flexible FIFO architecture that can accommodate 1394 packets of diverse sizes. The 400 Mbps device has a FIFO architecture that allows packets of various sizes for isochronous and asynchronous communications. The ability to handle packets of various sizes means that designers can maximize the performance of a system by optimizing the size of the packet to the host bus bandwidth. The TSB12LV01 is a 3.3V device and it comes in a 100-pin thin quad flat pack (TQFP) package. Consumer Electronics The DVLynx has a robust set of features and capabilities for consumer electronics applications such as camcorders, videocassette recorders (VCRs) and set top boxes (STBs) for cable television. The device assures that the system's processor will be able to function at peak performance levels by automatically parsing DV data and non-DV isochronous data into 1394 packets for transmission over 1394. This offloads some of the processing burden from the processor so its capabilities can be devoted to system-level requirements. The DVLynx's data transfer rate of 200 Mbps makes the device one of the fastest link layer devices for DV data. With the large on-chip FIFO and a bulky data interface (BDIF), the DVLynx is able to perform full bi-directional DV data transfers or simultaneous DV and isochronous data transfers. The device's 8K bytes of FIFO memory is logically partitioned for asynchronous, isochronous and DV data transmissions or receptions. For developing embedded applications, the DVLynx is fully supported with software such as HAL. 30 Years of Data Transmission Leadership By leveraging its 30 years of experience with many data transmission standards, including, Fibre Channel, Gigabit Ethernet, RS-232, RS-422, RS-485 and others, TI's Mixed-Signal Products group quickly established the market leadership position with its 1394 technology. These link layer devices join TI's growing family of 1394 solutions, which includes physical layer chips, software and development tools. Additionally, TI offers worldwide design support including 1394 seminars and technical training around the world. Pricing and Availability The PCILynx2 is expected to be available from Texas Instruments and its authorized distributors late in the second quarter of 1998 for approximately $11.32 in quantities of 1,000. The TSB12LV01, DVLynx and GP2Lynx are anticipated to be available during the third quarter of 1998 for approximately $8.10, $13.49 and $6.00, respectively, in quantities of 1,000.
More information about TI's 1394 products is available on the World Wide Web at
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