Related Documentation:
Application Specific Integrated Circuits
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Joint Development Effort to Provide Advanced ASIC Design Methodologies for Million-Gate, System-on-a-Chip DesignsDALLAS (June 8, 1998) -- Texas Instruments (TI) and Synopsys Inc. today announced a joint development effort to provide system-level, application-specific integrated circuit (ASIC) design capability for the creation of advanced system-on-a-chip (SoC) components based on 0.25-micron technology and 0.18-micron TImeline Technology. Ongoing development will provide TI internal chip designers and customers with new, flexible, easy-to-use design reuse methodologies for major improvements in design capability. These new design methodologies are expected to be available beginning in the fourth quarter of 1998. "This innovative development effort leverages TI's strengths in ASIC design and process technologies with Synopsys' expertise in design tools and methodologies. Together, TI and Synopsys will accelerate the pace of SoC design," said Dave Shepard, Worldwide Marketing Manager, ASIC Products, Texas Instruments. "TI benefits with more streamlined design flows and enhanced SoC design capabilities, while Synopsys tools and methodologies are further refined through working with a major System Level Integration (SLI) supplier on leading-edge applications." Versatility and Ease-of-Use for ASIC Designers TI and Synopsys' Professional Services have worked for the past year to develop a SoC design environment integrating best-in-class features from a variety of sources into TI's ASIC SLI design flows. The effort included hardware description language (HDL) coding guidelines, a customized version of Synopsys Design Environment (SDE), and silicon implementation methodologies ranging from the conceptual level down to the layout of individual gates. The resulting new environment brings greater consistency, robustness, simplicity, flexibility and design reuse to both standard cell and gate array designs. The consistency of the new flows will enhance TI's ability to share information among design groups. It also will enable the company to pass the same information more effectively to its ASIC customers. At the same time, the flows' simplicity will reduce time-to-market. Synopsys will support and maintain the flows, giving TI and its customers a valuable source of design and methodology expertise. "The design of million-gate ASICs requires an extremely advanced level of expertise that until now was available to only a few customers," said Shepard. "TI and Synopsys are embedding much of this expertise in the design flow in order to facilitate SLI for ASIC designers with little prior experience. This release gives our customers a cutting-edge methodology to take advantage of the 0.18-micron process." "TI is an acknowledged leader in the area of DSP solutions, particularly in wireless and computer peripheral applications, which are almost always SoC designs," said Didier Lacroix, director of solution development and marketing, professional services, Synopsys. "Synopsys is a leading supplier of SoC design tools and next generation design methodologies. Together, we are creating a consistent and flexible design environment to enable designers to achieve the highest possible design productivity while preserving competitive design advantages." TI's new methodology is crafted to give designers flexibility, such as support for VHDL and Verilog included at the description level, while maintaining its easy-to-use, consistent framework throughout the flows. In addition, designers can merge other tools into the flows to address their specific requirements. The design flows support integration of pre-designed modules for embedded processors, including Advanced RISC Machines (ARM™) microprocessors and digital signal processors (DSPs). Predefined synthesizable (soft) or non-synthesizable (hard) cores, both digital and analog, can also be included. TI has established guidelines for integrating new modules and is working with IP vendors developing modules to include in its ASIC libraries. The company is also retrofitting existing modules, such as Universal Serial Bus (USB) and IEEE 1394 interfaces, a 10/100 Ethernet media access controller (MAC), HDLC and memories for use in these flows. # # # Trademarks:
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