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Mixed-Signal and Analog Products New TMS320C54x DSPs Offer High Performance and Low Cost Options for Designers of Wireless and Wireline Communications Systems TMS320C5402 and TMS320C5420 Third Party Quotes
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New TMS320C54x DSPs Offer High Performance and Low Cost Options for Designers of Wireless and Wireline Communications SystemsDigital signal processors (DSPs) with increasing millions of instructions per second (MIPS) invariably grab the headlines, but for designers of wireless and wireline voice and data communications systems, high performance along with low power dissipation and small size are what is important. Two new power-efficient, ultra-small devices from Texas Instruments (TI), the TMS320C5402 and TMS320C5420, provide new levels of performance and affordability for designers of single-channel, end-user terminal systems and multi-channel infrastructure equipment. Less is More DSP performance, as measured by a MIPS rating, is easily obtained. However, system performance is more often limited by power consumption, space and cost. Without regard to power consumption, extremely high-performance DSPs can be produced, but they will quickly outstrip the board-level power budget of a system before they reach the physical space limitation of the board. In order to maximize the board-level power density, increasing DSP performance and lowering DSP power dissipation must be considered together. In addition, smaller packaging with more integration of memory and peripherals is required to increase channel density. Since its introduction, the 'C54x generation of DSPs has delivered varying combinations of high performance, low power and small size optimized to meet the particular needs of networking, telephony, and telecommunications end-equipments. Designed for Lowest Power The architecture of the 'C54x was designed to assure the generation would lead the industry in every measure of low power dissipation. The true measure of power dissipation is the power per function. Milli-amps (mA) per MIPS is the unofficial industry measurement, however, the power supply voltage and the efficiency of the MIPS are integral in the calculation of power dissipation. For instance, the mA/MIPS number could be low, but the device operates at 3.3V or higher and the overall power for the device will be higher. Or maybe the mA/MIPS number is low and the device operates at 2.5V, but the efficiency of the MIPS is poor. If two processors have the same mA/MIPS number and the same core power supply voltage, but one can perform a given function with fewer MIPS, that processor will have lower power per function. Extremely dense circuitry made possible by process breakthroughs like TI's 0.18-micron TImeline technology, combined with measurements such as the power dissipated per MIPS of performance, show why the 'C54x generation leads in those metrics designers care about most. Several factors contribute to the low power consumption of the 'C5402 and 'C5420. What makes the 'C54x generation unique is that this architecture was designed to allow modules of the device to automatically shut down when not in use. Just as a laptop computer can shut off power to the screen or keyboard during periods of inactivity, a 'C54x DSP can save power by shutting off its serial ports, host port interface or other functional modules when these resources are not needed. A major contributor to the low power consumption of the 'C5402 and 'C5420 is the high degree of integration made possible by TI's advances in architectural design and process technology. The 'C5420, for example, has been designed to be a deeply-embedded DSP engine that maximizes on-chip processing while minimizing off-chip accesses. With 200 MIPS of performance and 200K words of on-chip random access memory (RAM), the 'C5420 can perform more algorithm channels at zero-wait state using on-chip memory and peripherals. Off-chip accesses require significantly more power than on-chip operations. Knowing What Designers Need As the leader in DSP technology, TI has gained insight over the years into the specific needs of designers. This has shaped its DSP product strategies to the point where certain DSPs target the performance, space and power requirements of particular applications. In addition, every price/performance metric commonly used by designers invariably places TI's DSPs as leaders in the industry. For example, with 16K words of on-chip memory and up to 100 MIPS of performance, the 'C5402 DSP ideally meets the needs of many single-channel, portable applications. By establishing a $5 entry point into all the benefits of the 'C54x generation, the 'C5402 is making many new types of space-constrained applications feasible, like wireless telephones the size of a hearing aid, wireless phones with Internet browsing capabilities, surgically implanted digital hearing aids and many more. While the 'C5402 meets the entry-level, single-channel needs of communications system designers, the 'C5420 targets higher-end, multi-channel systems that typically support many channels in a very limited space. For these types of applications, the high performance levels of the 'C5420 combined with its very high level of integration give it a decided advantage over other DSPs. The 'C5420, with two DSP cores, 200 MIPS and 200K words of RAM, extends the 'C54x generation and can support multiple channels on-chip with little need for off-chip accesses. As a result, the 'C5420 acts as a deeply-embedded DSP resource engine capable of very high performance and extremely low power dissipation in an ultra-small space. Packing More Punch Both the 'C5420 and 'C5402 devices come in TI's microStar™ 12 x 12 x 1.4 mm ball grid array (BGA) package. The minuscule dimensions of these 'C54x devices take on added importance for designers when they realize how much functionality is provided in such little space. A typical measurement designers of wireless and wireline communications systems will use to gauge the capabilities of a DSP is how many communications channels within a given area can the device support with its on-chip capabilities. This is usually expressed as the number of channels supported per square inch of chip area. A channel refers to a set of algorithms, like dual tone multi-frequency (DTMF) generation, echo cancellation, encoding/decoding and others that are used to establish a communications connection. An example of a channel on a DSP is a set of algorithms that may require 48 MIPS of processing performance and 30K words of memory. The 'C5420, with its 200 MIPS and 200K words of on-chip RAM, doubles the number of channels supported by previous DSPs in the 'C54x generation and it does so in an area smaller than a U.S. dime. The number of channels per square inch supported by the 'C5420 is unmatched in the industry. Peripherals Suited for the Application The 16K words of on-chip memory of the 'C5402 effectively meets the needs of single-channel communications systems. In addition, the 'C5402 features 22 general-purpose bit I/O pins, a 8-bit host port interface, 2 multi-channel buffered serial ports (McBSP), and a DMA controller which allow it to interface to a variety of external devices. This is particularly well suited for certain emerging communications applications like internet protocol (IP) telephones and other consumer communications systems. The McBSPs are serial ports featured on both the 'C5402 and the 'C5420 to maximize the use of the same peripherals for both terminal and infrastructure applications. For telecommunications systems, McBSPs can cut system costs and reduce space requirements. A McBSP connects to a telecommunications carrier's high-capacity T1/E1 line via a framer chip and handles the sorting operations inherent in T1/E1 lines. Many of the functions performed by a McBSP were previously done in external logic. Next Generation Communication Systems With their unique combination of low power consumption, small space, high performance and on-chip integration, the 'C5402 and 'C5420 represent a leap forward for the 'C54x generation of DSPs in terms of providing what wireless and wireline communication system designers need in their next generation systems.
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