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Texas Instruments Continues ADSL Evolution with New Chipset and Evaluation Module

Low Power, Multi-Function Features Meet End Equipment Manufacturer’s Needs

DALLAS (Nov. 16, 1998) -- Leveraging its popular TMS320C6000 DSP core and multi-line architecture, Texas Instruments (TI) announces its next generation ADSL chipset for central office and customer premises equipment applications. This chipset features improved power, size, integration, features and functionality -- all designed to further accelerate the deployment of ADSL technology worldwide.

Labeled the TNETD3000, the chipset offers a 60 percent power reduction combined with a 33 percent smaller footprint. Central office equipment manufacturers will realize a more dense multi-line solution, while PC and modem manufacturers will see an evolution to a more power efficient and cost-effective 1/2-size card and external modem solutions.

"ADSL is on the cusp of mass deployment," said James Collinge, marketing manager for TI’s Broadband Access Group. "Trials have proven the viability and pent-up demand is increasing. The next step is enabling service providers to deploy this technology with confidence that profit can be made. By addressing the issues of power, size, functionality and cost, we believe we have moved s giant step further."

Multi-Function Features Offer Worldwide Flexibility

Today, voice and data services in Europe leverage Integrated Services Digital Network (ISDN). In North America, ISDN is deployed to support telecommuting applications second line services. TI’s latest ADSL supports the coexistence of ISDN and ADSL.

The chipset introduces a new universal digital interface (UDI), enhancing the functionality of the chipset, making it more flexible and robust to handle multiple applications. Additionally, TI has integrated Asynchronous Transfer Mode (ATM) technology onto the chipset by placing Utopia 2 interface and transmission convergence functions on the UDI chip. The integration of these functions reduces overall system cost and it provides a seamless connection to system backplanes, microprocessors, and Segment and Reassembly (SAR) devices and various other external interfaces.

"By integrating ATM functionality directly into the chipset solution, we have enabled our customers with increased flexibility and lower total system cost, real-estate, and power. This translates into more users-per-square-inch in central office and digital loop carrier environments where space is a critical resource," Collinge said.

Dynamic Evaluation Module Speeds Tests and Trials

In addition to the chipset, TI will make available to select customers a TNETD3000 evaluation module (EVM) offering equipment manufacturers the most comprehensive test and trial scenario available. Comprised of a common motherboard, the EVM features a transceiver module with the ADSL chipset positioned in an optimized daughter card supporting full rate ADSL T1.413 i2, UADSL over POTS and ISDN. A local interface module supports either serial data for frame-based applications or RS422 connections for test equipment. A second local interface module includes an ATM 25 Mbps interface enabling manufacturers to connect their ATM backplane products directly to the EVM for real-world test functionality to their existing equipment.

Price and Availability

The TNETD3000 is scheduled to be available to priority customers in January 1999. Pricing for central office chipsets will be $90 while client side solutions will be $50, both in 10,000 quantities.

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