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CLOCKED FIFOS

1. ADVANCED BUS-MATCHING/BYTE-SWAPPING FOR INTERNETWORKING FIFO APPLICATIONS
• scaa014a.pdf (70 KBytes) (Abstract)

2. ADVANCED LOW-POWER CMOS FIFOS
• scaa017.pdf (88 KBytes) (Abstract)

3. FIFO MAILBOX-BYPASS REGISTERS: USING BYPASS REGISTERS TO INITIALIZE DMA CONTROL
• scaa007a.pdf (66 KBytes) (Abstract)

4. FIFO MEMORIES: SOLUTIONS FOR INCREASING CLOCK RATES AND DATA WIDTHS
• szza001a.pdf (96 KBytes) (Abstract)

5. FIFO SYNCHRONOUS RETRANSMIT: PROGRAMMABLE DSP-INTERFACE FOR FIR FILTERING
• scaa009a.pdf (77 KBytes) (Abstract)

6. INTERFACING TI CLOCKED FIFOS WITH TI FLOATING-POINT DSPS
• scaa005a.pdf (109 KBytes) (Abstract)

7. INTERNETWORKING THE SN74ABT3614
• scaa018a.pdf (120 KBytes) (Abstract)

8. METASTABILITY PERFORMANCE OF CLOCKED FIFOS
• scza004a.pdf (65 KBytes) (Abstract)

9. OPTIMIZING DSP-BASED DIGITAL FILTERS WITH APPLICATION-SPECIFIC FIFOS
• scaa021.pdf (87 KBytes) (Abstract)

10. PARITY-GENERATE/CHECK FEATURES FOR HIGH-BANDWIDTH-COMPUTING FIFO APPLICATIONS
• scaa015a.pdf (53 KBytes) (Abstract)

11. POWER-DISSIPATION CALCULATIONS FOR TI FIFO PRODUCTS
• scaa013a.pdf (108 KBytes) (Abstract)

12. SEAMLESS PROCESSOR INTERFACE USING FIFO BUS MATCHING AND BYTE SWAPPING
• scaa020.pdf (98 KBytes) (Abstract)

13. SIMULTANEOUS-SWITCHING NOISE ANALYSIS FOR TEXAS INSTRUMENTS FIFO PRODUCTS
• scaa008a.pdf (149 KBytes) (Abstract)

14. SPARC MBUS-TO-FUTUREBUSPLUS BRIDGE USING THE TI FUTUREBUSPLUS CHIPSET
• scaa019a.pdf (66 KBytes) (Abstract)

15. USING THE HIGH-SPEED, HIGH-DRIVE SN74ABT7819 FIFO
• scaa016a.pdf (98 KBytes) (Abstract)

EPROM

1. IMPLEMENTING THE TMS320C26 DSP AS A RIB COUNTER
• spra325.pdf (165 KBytes) (Abstract)

FIFOS

1. FIFO MEMORIES: FINE-PITCH SURFACE-MOUNT MANUFACTURABILITY
• scza003a.pdf (51 KBytes) (Abstract)

2. FIFO MEMORIES: SOLUTIONS FOR INCREASING CLOCK RATES AND DATA WIDTHS
• szza001a.pdf (96 KBytes) (Abstract)

3. FIFO MEMORIES: SOLUTIONS TO REDUCE FIFO METASTABILITY
• scaa011a.pdf (48 KBytes) (Abstract)

4. FIFO MEMORIES: SURFACE-MOUNT PACKAGES FOR PCMCIA APPLICATIONS
• sdma001a.pdf (94 KBytes) (Abstract)

5. MEDIUM-PIN-COUNT SURFACE-MOUNT PACKAGE INFORMATION
• sspa001b.pdf (65 KBytes) (Abstract)

6. POWER-DISSIPATION CALCULATIONS FOR TI FIFO PRODUCTS
• scaa013a.pdf (108 KBytes) (Abstract)

7. SIMULTANEOUS-SWITCHING NOISE ANALYSIS FOR TEXAS INSTRUMENTS FIFO PRODUCTS
• scaa008a.pdf (149 KBytes) (Abstract)

FLASH

1. 512K FLASH MEMORY TECHNICAL BRIEF
• smja003.pdf (413 KBytes)

SPECIALTY FIFOS

1. FIFOS WITH A WORD WIDTH OF ONE BIT
• scaa006a.pdf (135 KBytes) (Abstract)

STROBED FIFOS

1. 1K X 9 X 2 ASYNCHRONOUS FIFOS - SN74ACT2235/2236
• scaa010b.pdf (64 KBytes)

2. ADVANCED LOW-POWER CMOS FIFOS
• scaa017.pdf (88 KBytes) (Abstract)

3. FIFO MEMORIES: SOLUTIONS FOR INCREASING CLOCK RATES AND DATA WIDTHS
• szza001a.pdf (96 KBytes) (Abstract)

4. SIMULTANEOUS-SWITCHING NOISE ANALYSIS FOR TEXAS INSTRUMENTS FIFO PRODUCTS
• scaa008a.pdf (149 KBytes) (Abstract)

SYNCHRONOUS FIFOS

1. FIFO MAILBOX-BYPASS REGISTERS: USING BYPASS REGISTERS TO INITIALIZE DMA CONTROL
• scaa007a.pdf (66 KBytes) (Abstract)