************************************************ * Mon Jan 27 15:26:17 CST 1986 * ************************************************ * BOOT * * BOOTLOADER FIRMWARE FOR 68HC811A2 * * EQUATES FOR USE WITH INDEX OFFSET = $1000 * PORTD EQU $08 DDRD EQU $09 SPCR EQU $28 (FOR DWOM BIT) BAUD EQU $2B SCCR1 EQU $2C SCCR2 EQU $2D SCSR EQU $2E SCDAT EQU $ 2F PPROG EQU $3B TEST1 EQU $3E CONFIG EQU $3F * * MORE EQUATES * EEPSTR EQU $F800 START OF EEPROM EEPEND EQU $FFFF END OF EEPROM * ******** * THIS BOOTSTRAP PROGRAM ALLOWS THE USER TO * DOWNLOAD A PROGRAM OF EXACTLY 256 BYTES. * THE PROGRAM MUST START AT $0000. * EACH BYTE OF THE PROGRAM IS RECEIVED BY THE * SCI, STARTING WITH THE $0000 BYTE AND WORKING * UP TO THE $00FF BYTE. * * THE TRANSMITTER WILL BE USED FOR THE PURPOSE * OF COMMUNICATION TO THE OUTSIDE WORLD. * ******** * THIS PROGRAM WAS KEPT AS MUCH THE SAME AS THE 68HC11A8 * BOOTLOADER AS POSSIBLE. THE ONLY CHANGE IS IN THE * SECURITY FEATURE WHICH REQUIRES THE UPPER 4 BITS OF * THE CONFIG REGISTER (EEPROM MAPPING BITS) TO BE ONE'S * IF THE USER WISHES TO KEEP THE EEPROM SECURED. TO MAKE * ROOM FOR THIS THE MASK I.D. BYTE WAS REMOVED (IT IS NOT * NEEDED FOR A NON-ROM PART ANYWAY). * ************************************************ ORG $BF40 * BEGIN EQU * * INIT STACK LDS #$00FF * INIT X REG FOR INDEXED ACCESS TO REGISTERS LDX #$1000 ******** * PUT PORT D IN WIRE OR MODE BSET SPCR,X $20 * INIT SCI AND RESTART BAUD DIVIDER CHAIN LDAA #$A2 DIV BY 16 STAA BAUD,X * RECEIVER & TRANSMITTER ENABLED LDAA #$0C STAA SCCR2,X ******** * TEST THE SECURITY BIT BRSET CONFIG,X $08 NOSEC ************************************************ * WE ARE IN SECURITY MODE * * OUTPUT $FF ON TRANSMITTER AGAIN EQU * LDAA SCSR,X LDAA #$FF STAA SCDAT,X * ERASE EEPROM: * SET ERASE AND EELAT BITS BEFORE USING "ERASE" LDAB #$06 STAB PPROG,X STAB EEPSTR WRITE EEPROM LOCATION BSR ERASE * ACCB IS NOW SET FOR $06 ******** * ERASE CYCLE IS COMPLETE * * IF THE EEPROM IS NOT ENABLED * OR IF THE EEPROM ISN'T AT $FXXX, * WE CAN'T CHECK THAT THE EEPROM IS ERASED BRSET CONFIG,X $F1 EEON CHECK IT! BRA NOEE SKIP IT! * EEPROM IS ON, * NOW CHECK THAT THE EEPROM IS ERASED EEON EQU * LDY #EEPSTR LOOP EQU * CMPA 0,Y (A = $FF) * ANY UNERASED BYTE SENDS US BACK TO ERASE AGAIN BNE AGAIN INY CPY #EEPEND+1 BNE LOOP NOEE EQU * ************************************************ * WRITE $FF TO ENTIRE RAM (EXCEPT LAST TWO BYTES * WHICH ARE USED BY THE STACK) * ERAM EQU * PSHX LDX #$FF02 LOP1 EQU * STAA $FE,X INX BNE LOP1 PULX ************************************************ * NOW ERASE CONFIG REGISTER * ECONFG EQU * * SET ERASE AND EELAT BITS STAB PPROG,X (B STILL = $06) * WRITE CONFIG REGISTER LATCH IT FOR ERASURE STAB CONFIG,X BSR ERASE ******** * ERASE CYCLE IS COMPLETE * ************************************************ * NON-SECURITY AND SECURITY MODES MEET HERE * NOSEC EQU * * SEND BREAK TO SIGNAL START OF DOWNLOAD BSET SCCR2,X $01 * CLEAR BREAK AS SOON AS START BIT IS DETECTED BRSET PORTD,X $01 * BCLR SCCR2,X $01 CLEAR BREAK * WAIT FOR FIRST CHARACTER (USERS SEND $FF) BRCLR SCSR,X $20 * WAIT FOR RDRF LDAA SCDAT,X READ DATA * IF DATA = $00 (BREAK OR $00), THEN JUMP TO EEPROM BNE NOTZERO JMP EEPSTR NOTZERO EQU * * IF DATA = $55, THEN SKIP DOWNLOAD (TEST MODE) CMPA #$55 BEQ STAR * IF DATA = $FF, THEN /16 IS CORRECT BAUD CMPA #$FF BEQ BAUDOK * ELSE CHANGE TO /104 (/13 & /8) 1200 @ 2MHZ BSET BAUD,X $33 * THEN DOWNLOAD 256 BYTE PROGRAM BAUDOK EQU * LDY #$0000 INIT POINTER * READ IN PROGRAM AND PUT INTO RAM BK2 EQU * BRCLR SCSR,X $20 * WAIT FOR RDRF LDAA SCDAT,X STAA $00,Y STAA SCDAT,X HANDSHAKE INY * UNTIL THE END IS REACHED CPY #$0100 BNE BK2 ************************************************ * ALL START USER'S PROGRAM * STAR EQU * JMP $0000 ************************************************ * EEPROM ERASE SUBROUTINE * * ASSUMES CALLING ROUTINE HAS ALREADY SET ERASE * AND EELAT BITS, AS WELL AS ACCESSED CONFIG REG * IF THAT IS TO BE ERASED * * ENTRY X=$1000 * EXIT X=$1000, Y=$0000 * ERASE EQU * * SET EEPGM BIT BSET PPROG,X $01 * 10 MILLISEC DELAY @ 2.1 MHZ LDY #3000 BK1 DEY BNE BK1 * TURN OFF EEPGM BIT BCLR PPROG,X $01 * TURN OFF ERASE AND EELAT BITS CLR PPROG,X RTS ************************************************ * VECTORS * * ORG $BFD6 NEEDED IF BOOTROM < MAX * FDB $100-60 SCI FDB $100-57 SPI FDB $100-54 PULSE ACCUM INPUT EDGE FDB $100-51 PULSE ACCUM OVERFLOW FDB $100-48 TIMER OVERFLOW FDB $100-45 TIMER OUTPUT COMPARE 5 FDB $100-42 TIMER OUTPUT COMPARE 4 FDB $100-39 TIMER OUTPUT COMPARE 3 FDB $100-36 TIMER OUTPUT COMPARE 2 FDB $100-33 TIMER OUTPUT COMPARE 1 FDB $100-30 TIMER INPUT CAPTURE 3 FDB $100-27 TIMER INPUT CAPTURE 2 FDB $100-24 TIMER INPUT CAPTURE 1 FDB $100-21 REAL TIME INT FDB $100-18 IRQ FDB $100-15 XIRQ FDB $100-12 SWI FDB $100-9 ILLEGAL OP-CODE FDB $100-6 COP FAIL FDB $100-3 CLOCK MONITOR FDB #BEGIN RESET END