/*********************************************************************** 
* NOTICE
* All files contained on this disk are subject to the licensing conditions
* issued by MOTOROLA Inc.
*
* All files are copyright 1993 by MOTOROLA Inc. 
************************************************************************/


/********************************************************
 * File:	bisync.c
 *
 * Description:
 *	The driver routines for handling a BISYNC port.
 *
 * Routines:
 *	bisync_init
 *	bisync_status
 *
 * Author:
 *	Jonathan Masel
 ********************************************************/

#include "gct.h"
#include "msg.h"
#include "config.h"
#include "types.h"
#include "mtypes.h"
#include "bss.h"
#include "quicc.h"
#include "states.h"
#include "bisync.h"





/********************************************************
 * routine:	bisync_init
 *
 * description:
 *	Initialize the driver tables for
 *	BISYNC ports.
 *
 * arguments:
 *	n		the driver's child number
 *	bisync		points to an scc configuration structure
 *
 * return code:
 *
 * side effects:
 *
 ********************************************************/
bisync_init(n, scc)
int n;
struct scc *scc;
{
	GCT *gct;
	int i;
	int (* *protocol)();
	unsigned adr, rom;
	WORK_AREA *wa;
	extern int bisync_txreq(), bisync_rxfr(),
		bisync_conf(), bisync_txerr(),
		bisync_busy(),
		return_to_pool(), bisync_status();

	GETGCT(gct);
	protocol = gct->driver->protocol;
	rom = gct->driver->rom;
	wa = (WORK_AREA *)gct->driver->child[n].work_area;

	adr = (unsigned)bisync_txreq + rom;
	protocol[SUB(TX_REQ) | BISYNC_STATE] = (int (*)())adr;
	adr = (unsigned)bisync_rxfr + rom;
	protocol[SUB(RX_IND) | BISYNC_STATE] = (int (*)())adr;
	adr = (unsigned)bisync_conf + rom;
	protocol[SUB(TX_CONF) | BISYNC_STATE] = (int (*)())adr;
	adr = (unsigned)bisync_txerr + rom;
	protocol[SUB(TX_ERR) | BISYNC_STATE] = (int (*)())adr;
	adr = (unsigned)bisync_busy + rom;
	protocol[SUB(BUSY) | BISYNC_STATE] = (int (*)())adr;
	adr = (unsigned)return_to_pool + rom;
	protocol[SUB(RTP) | BISYNC_STATE] = (int (*)())adr;
	adr = (unsigned)bisync_status + rom;
	protocol[SUB(STATUS) | BISYNC_STATE] = (int (*)())adr;

	gct->driver->child[n].upper = scc->upper;
	gct->driver->child[n].state = BISYNC_STATE;
	gct->driver->child[n].smac = &protocol[BISYNC_STATE];
	wa->BDlast = T_B;
	wa->BDfirst = T_B | T_RESET;
	wa->BDrx = R_I;
	wa->intr_rxfr = BISYNC_RX;
	wa->intr_txbd = BISYNC_TX;
	wa->intr_terr = BISYNC_TXE;
	wa->intr_busy = BISYNC_BUSY;
	wa->t_error = BISYNC_T_ERROR;

	/*
	 * initialize bisync-specific parameters
	 */
	wa->pram->pscc.b.prcrc = scc->pram.b.prcrc;
	wa->pram->pscc.b.ptcrc = scc->pram.b.ptcrc;
	wa->pram->pscc.b.bsync = scc->pram.b.bsync;
	wa->pram->pscc.b.bdle = scc->pram.b.bdle;
	for(i = 0; i < 8; i++)
		wa->pram->pscc.b.cc[i] = scc->pram.b.cc[i];
	wa->pram->pscc.b.rccm = scc->pram.b.rccm;

	/*
	 * initialize bisync counters
	 */
	wa->pram->pscc.b.parec = 0;


}



bisync_status()
{
}