/*********************************************************************** 
* NOTICE
* All files contained on this disk are subject to the licensing conditions
* issued by MOTOROLA Inc.
*
* All files are copyright 1993 by MOTOROLA Inc. 
************************************************************************/


/********************************************************
 * File:	smi.c
 *
 * Description:
 *	The driver routines for handling an SMI port.
 *
 * Routines:
 *	smi_init
 *	smi_rxfr
 *	smi_busy
 *	smi_txerr
 *	smi_rtp
 *	smi_status
 *
 * Author:
 *	Jonathan Masel
 ********************************************************/

#include "gct.h"
#include "msg.h"
#include "config.h"
#include "types.h"
#include "mtypes.h"
#include "states.h"
#include "bss.h"
#include "quicc.h"
#include "status.h"




/********************************************************
 * routine:	smi_init
 *
 * description:
 *	Initialize the driver tables for
 *	SMI ports.
 *
 * arguments:
 *	n		the driver's child number
 *	mode		the SCP_SMI mode register
 *	upper		the module above the SMI ports
 *
 * return code:
 *	0		on success
 *	else		no room in parameter RAM (SCC3 Tx overflow)
 *
 * side effects:
 *
 ********************************************************/
smi_init(n, quicc, mode, upper)
int n, mode, upper;
struct quicc *quicc;
{
	int i;
	GCT *gct;
	int (* *protocol)();
	WORK_AREA *wa;
	unsigned adr, rom;
	struct scp_smi_pram *spram;
	extern int smi_txreq(), smi_rxfr(),
		smi_conf(), smi_txerr(),
		smi_busy(),
		smi_rtp(), smi_status();

	GETGCT(gct);
	protocol = gct->driver->protocol;
	rom = gct->driver->rom;
	adr = (unsigned)smi_txreq + rom;
	protocol[SUB(TX_REQ) | SMI_STATE] = (int (*)())adr;
	adr = (unsigned)smi_rxfr + rom;
	protocol[SUB(RX_IND) | SMI_STATE] = (int (*)())adr;
	adr = (unsigned)smi_conf + rom;
	protocol[SUB(TX_CONF) | SMI_STATE] = (int (*)())adr;
	adr = (unsigned)smi_txerr + rom;
	protocol[SUB(TX_ERR) | SMI_STATE] = (int (*)())adr;
	adr = (unsigned)smi_busy + rom;
	protocol[SUB(BUSY) | SMI_STATE] = (int (*)())adr;
	adr = (unsigned)smi_rtp + rom;
	protocol[SUB(RTP) | SMI_STATE] = (int (*)())adr;
	adr = (unsigned)smi_status + rom;
	protocol[SUB(STATUS) | SMI_STATE] = (int (*)())adr;

	gct->driver->child[n].upper = upper;
	gct->driver->child[n].state = SMI_STATE;
	gct->driver->child[n].smac = &protocol[SMI_STATE];

	/*
	 * initialize work area
	 */
	wa = (WORK_AREA *)gct->driver->child[n].work_area;
	if( quicc )
		wa->quicc = quicc;
	else
		quicc = wa->quicc;
	wa->pram = (struct scc_pram *)
		&(quicc->pram[2+n].scc.pothers.idma_smc.smc);
	/*
	 * The regs pointer is defined as a pointer to scc_regs.
	 * Here we use the same pointer to point at the smc_regs.
	 * This is the reson for the casting.
	 */
	wa->regs = (struct scc_regs *)&quicc->smc_regs[n];
	wa->rxerr_mask = 0xffff;
	wa->tcount = wa->rcount = 0;
	wa->terr_cnt = wa->rerr_cnt = 0;

	/*
	 * look for Wrap bit in scc3 Tx BD table
	 * preceding the SMC area
	for(i = 0; i < 8; i++)
		if( quicc->pram[2].scc.tbd[i].status & T_W )
			break;
	if( i > 4 )
		return(NO_SMC_SCP);
	 */

	/*
	 * first initialize the scp/smi parameter ram
	 */
	spram = (struct scp_smi_pram *)wa->pram;
	spram->scp_bd = 0;
	spram->smi0_r = 0;
	spram->smi0_t = 0;
	spram->smi1_r = 0;
	spram->smi1_t = 0;

	/*
	 * write scp/smi registers
	 * (first initialize the smi BD's)
	 */
	quicc->smc_regs[n].smc_smcmr = mode;


	return(0);
}



smi_txreq()
{
}

smi_conf()
{
}

smi_rxfr()
{
}

smi_txerr()
{
}

smi_rtp()
{
}

smi_status()
{
}

smi_busy()
{
}