68HC05 Instruction Set — Part 6
Branches on Condition Code Register Bits
BCC branch if carry clear (C = 0) BCS branch if carry set (C = 1) BEQ branch if equal (Z = 0) BNE branch if not equal (Z = 1) BHCC branch if half carry clear (H = 0) BHCS branch if half carry set (H = 1) BHI branch if higher (C or Z = 0) BHS branch if higher or same (C = 0) BLS branch if lower or same (C or Z = 1) BLO branch if lower (C = 1) BMI branch if minus (N = 1) BPL branch if plus (N = 0) BMC branch if interrupts are not masked (I = 0) BMS branch if interrupts are masked (I = 1)
Notes:
This group of branch instructions allow changes in program flow based on the states of various condition code register bits. Branch instructions use the relative addressing mode and can move backward 128 bytes or forward 127 bytes in memory from the address of the next instruction.
Notice that the BCS (branch if carry set) and BLO (branch if lower) instructions test the same condition code register bit. These instructions are the same and have the same opcode. The same is also true of BCC (branch if carry clear) and BHS (branch if higher or same).
Assemblers for the 68HC05 will recognize BCS, BLO, BCC, and BHS and assemble them to the appropriate opcodes.