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FAQ's Installation Board Support Custom Hardware Configuration DSP Compiler, Assembler, Linker Scope Tools Configuration Tools Error Messages DSP/BIOS Kernel API C54x Tech Support Request Form Press Release |
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2. Does DSP/BIOS support extended memory on C548/C549 board? Given that the DSP/BIOS user follows the below guidelines: When using multiple program pages, the program memory address range (0x0000 to 0x7FFF) is common to all pages. For example, for OVLY = 1, addresses 0x0000 to 0x7FFF in ANY page are mapped to on chip RAM (addresses 0x0000 to 0x7FFF on page 0). By putting the DSP/BIOS code and the hardware interrupt routines in this "common" address range. One could have several "instantiations" of DSP/BIOS (as many as pages), although DSP/BIOS is physically only using up some memory in the common memory page. If one needs a signal to run an algorithm that is not on this common page (page 0), create a stub function for this signal that looks like this (in pseudo-code): myfxn () { 'FCAL algorithmfxn()' } algorithmfxn() is the algorithm code that has been located on page n. The function that is associated to the signal is not algorithmfxn(), but myfxn(). myfxn () is located on page 0 (the same as DSP/BIOS), and just 'far calls' the real algorithm code. By setting signals this way, context switches do not need to be concerned with saving/restoring XPC, etc. 3. Can the data structures required by the DSP/BIOS be placed anywhere within the data space? Virtually all data in the DSP/BIOS can be moved to any valid data location (on-chip, off-chip,...). The only requirement is that 4 words be reserved in on chip memory (data page 0). These words are used to point to the system data page, hold timer counter registers, and the TRC trace mask. The user can freely place all the other data. |