Texas Instruments SN74ALVC78XX 3.3-Volt FIFO Memories

Fact Sheet: Summary of Key Features

ALVC78XX Family Features

• Operates at 3 to 3.6 volts.
• Advanced low-power CMOS (ALVC) technology
• Organized as 18-bit Widebus by 64-, 256- or 512-bits
• Full, empty and half-full flags
• Programmable almost full/almost empty flags
• Three-state output
• Multiple speed sorts available
• Packaged in space-saving 56-pin SSOP (shrink small outline package)

Clocked Architecture Features

• Free running read and write clocks can be asynchronous or coincident
• Input-ready and output-ready flags can be synchronized to the system's write and read clocks respectively
• Fast access times starting at 13 ns with a 50 Pico-farad output load
• Data rates up to 50 MHz

Strobed Architecture Features

• Load or unload clock can be asynchronous or coincident
• Fast access times beginning at 18 ns with a 50 Pico-farad output load
• Data rates up to 40 MHz

SC-95032

Please refer to profile number SCE01

 TI Home     Search     Feedback      Semiconductor Home