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New 64-Mbit Synchronous DRAM improves performance of portable computers, servers, workstations and PCsHOUSTON (January 27, 1996) -- A new family of 64-megabit (64M) synchronous DRAM (SDRAM) memory from Texas Instruments allows designers of workstations, PCs and file servers to improve system performance by increasing memory bandwidth while keeping the system's physical size to a minimum.
"We expect that our new memory family will initially be used in servers and workstations because these 64M devices will allow increased memory content while minimizing board space and offering improved system performance," said Bob Harrison, TI's MOS memory marketing manager for the Americas. "In addition to servers and workstations, laptop and notebook computers will also be early users of the TMS664XXX devices. Portable computers require high-performance memory that consumes low power and has the smallest possible footprint. With the reduced chip count of 64M SDRAM vs. 16M memories, the TMS644XXX provides the best solution for portable computers with at least 32MBytes of memory."
Designated as the TMS664XXX family, the low-voltage 3.3V devices are organized in four memory banks. Three different configurations are available: 4M x 4 x 4 banks (TMS664414), 2M x 8 x 4 banks(TMS664814) and 1M x 16 x 4 banks (TMS664164). The four storage banks can be accessed individually or in interleaved fashion. Interleaved access allows one bank to be accessed while another bank is active, reducing the wait states between row accesses and improving the speed of the system's memory.
"As evidenced by Microsoft's PC'97 initiative, the trend in the industry is toward systems that require more memory and, at the same time, very high-speed memory," Mr. Harrison said. "Our TMS664XXX family of SDRAMs delivers on both counts. By synchronizing with clock rates of up to 100 MHz, these devices can respond very quickly to data requests from the system's microprocessor, PCI bus, Advanced Graphics Port, Universal Serial Bus and 1394 peripheral bus."
To offer greater flexibility to system designers, the TMS664XXX devices are capable of either of two refresh modes. The TMS664XXX family features a 4K automatic refresh mode and a low-power self refresh mode. The burst length of data reads can be programmed to one, two, four, eight or a full page of addresses to meet the needs of a particular application. So that designers can tune the performance of memory to the access requirements of the system, the read latency of TMS664XXX devices can be set at two or three cycles. Devices in the TMS664XXX family have a high-speed, low-noise Low-Voltage TTL (LVTTL) interface.
The TMS664XXX family is fabricated with TI's 0.3-micron EPIC (enhanced performance implanted CMOS) technology. Clock rates of 100 MHz, 83 MHz and 66 MHz are currently supported. Plans for second generation TMS664XXX devices call for speeds of up to 143 MHz. Availability
The TMS664XXX family is available in 400-mil, 54-pin
thin small outline package (TSOP) and 168-pin dual in-line memory
module (DIMM). Both are Jedec-standard. Samples of the TMS664XXX
devices and DIMMs are available now from Texas Instruments. Volume
production is scheduled for the third quarter of 1997. |