|
Device Information   General  Operating
temp for the PZLC203 and C203 Silicon Update
Silicon Revision InformationRevisions
of Silicon Power-Up
Incorrectly Power ConsumptionPower Down MODE
Ratings C2xx
PLL5V BootloadingC2xx
Bootloading ExamplesBoot Up
Process Clock/Osc InformationPWM above 20
kHz Input Clock
Frequency Divided by Two Internal
Oscillator of the F206 Both
GP Timer1 / GP Timer 2InterruptsReceiving
Double Interrupts INTM bit
reset IDLE
will forces CPU to power-down Serial PortsSerial Port
to Perform RS232 Functions Literature Erratas F206 DataSheet Errata
(PDF)BSDL FilesTMS320F206
100-pin PZ package RegistersC2xx Shadow
or Stack Cycles for
Full Contact Switch Save Timing RequirementsN+1 cycles
to read Internal Memory Power
was Lost While Programming |
