Powerful New Processor Eliminates Need for Hardware
Design
Design Focus Becomes Software-Based, Cutting Development
Time and System Cost in Half
Texas Instruments has launched a new era in product development
by simultaneously unveiling an unprecedented 1600 MIPS microprocessor
high-level programming language (HLL) support that achieves virtually
the same performance as hand-tuned assembly language. The computing
power of the new TMS320C6x ('C6x) generation digital signal processors
(DSPs) promises to change the way new products are designed. They
easily provide the demanding performance needed to enable communications
applications and emerging real-time applications such as automotive
collision avoidance and intelligent home management. The benefits
to OEMs include smaller product-development teams, faster time-to-market,
and programmable flexibility, all at performance levels that have
previously been attainable only with complex custom hardware solutions.
Software Moves to Center Stage for Fast Time-to-Market
To take advantage of processor architecture, DSP application developers
have historically maximized software performance through an often
time-consuming process of hand-optimizing code. The efficiency
of the 'C6x software tools allows software engineers to program
in high-level C code, without concern for the mechanics of the
underlying processor platform.
The benefits of shifting the paradigm from hardware to software
includes cutting development time in half for DSP-based products,
and access to a widely expanded talent pool of application software
developers. These developers, who may be DSP neophytes, can immediately
take advantage of the power of the 'C6x, the world's highest performance
generation of DSPs. With the 'C6x, developers can program in highly-structured
and architecture-independent C code, dramatically reducing development
time while still achieving unprecedented performance.
Mainstream application programmers who don't intimately understand
underlying hardware constructs can now tap the full power of a
high-performance DSP processor. The 'C6x development tools provide
DSP programmer productivity with the easier expression of mathematical
algorithms without the need to specifically map an algorithm's
execution onto the processor architecture. HLL programming lets
programmers focus on their application-level core competencies
by effectively hiding the architectural details of a DSP. This
decreases the time it takes to develop a DSP-based product by
making DSPs easier to program, and DSP application software easier
to reuse.
Fine Tuning With DSP Industry's First Assembly Optimizer
Some key applications kernels can still benefit from the performance
tuning that is achievable with assembly language coding. Because
of this, TI has developed an Assembly Optimizer for the 'C6x generation
processors. Assembly language programmers can now have the kind
of tools that were previously only found in HLL programming. The
'C6x Assembly Optimizer lets programmers transparently target
the 'C6x's advanced Very Long Instruction Word (VLIW) architecture
by automatically scheduling and automatically parallelizing instructions
from serial, in-line assembly code. The 'C6x Assembly Optimizer
shields programmers from having to understand the minutiae of
the underlying processor architecture by allocating processor
resources such as registers and memory address locations. This
level of tool elegance is unique and unprecedented at the assembly
level.
Programmable Flexibility With the Performance of an ASIC
To accommodate the performance needs of applications such as multi-channel
communications infrastructure equipment, system developers have
classically had to turn to custom hardware designs to handle huge
amounts of data throughput. While application-specific integrated
circuits (ASICs) have historically enabled designers to achieve
performance well beyond the capabilities of programmable processors,
ASIC development is time-consuming, risky, and inflexible relative
to software programming.
The new design standard enabled by TI's 'C6x DSP processor generation
gives product developers the same performance level of custom
ASICs, but with the flexibility of a programmable processor. The
'C6x eliminates the need for time-consuming and expensive custom
hardware design, allowing designers to instead focus, for the
first time, on developing their products in software. Furthermore,
while even a minor design alteration can take months with an ASIC,
changes such as those required to accommodate shifting standards
in communications protocols can take only minutes with the 'C6x,
but without compromising system performance.
Tiny Core Yields High-Performance at Low Cost
Modern superscalar RISC and CISC microprocessors typically use
a great deal of on-chip hardware to optimize the scheduling of
computing tasks for the CPU while software is running. The 'C6x
generation's ultra-efficient C compiler handles instruction scheduling
in software before the code ever gets run on the chip. Consequently,
'C6x generation DSPs achieve a tremendous level of performance
but use very few transistors relative to other processors. The
result of such spartan use of silicon is far lower price/performance,
and improved device yield and reliability.
