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JTAG UBT goes with the flow

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1998 June Integration

LOGIC

JTAG UBT goes with the flow

As systems migrate to smaller, more complex designs, conventional testing methods become increasingly difficult. Texas Instruments offers a solution to this challenge with the new LVTH18512 Universal Bus Transceiver (UBT™).

LVTH18512 diagram & features

The '18512 is the first UBT to provide the benefits of IEEE 1149.1 (JTAG) boundary-scan testing in a thin shrink-small outline package (TSSOP). With leads on only two sides of the package, the 64-pin TSSOP facilitates efficient board placement with flow-through pinout design, making the device suitable for applications such as telecommunications, internetworking and high-end computing.

The '18512 integrates D-type latches and D-type flip-flops for operation in transparent, latched, registered and clocked modes. JTAG testability helps eliminate the need for traditional probing, and 3.3-V operation with 5-V tolerance allows for reduced power consumption and ease of use in a mixed-voltage design.

TI offers the industry's broadest portfolio of silicon solutions for system-, board- and device-level testing. More than 40 boundary-scan devices are available in Widebus™, octal and scan-support functions in the 3.3-V LVT and 5-V ABT, ACT and BCT product families.

For complete information, order: UBT with JTAG Sample Card (SCTP001) and Data Sheet (SCBS671B). See Related Product Information

UBT and Widebus are trademarks of Texas Instruments.

(c) Copyright 1998 Texas Instruments Incorporated. All rights reserved.
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