20-Gbps throughput ASIC

TGC4000 diagram Texas Instruments is shipping in volume a CMOS application specific integrated circuit (ASIC) that uses multiple 622 Mbps interfaces and achieves 20-Gbps bandwidth. The TGC4000 ASIC device replaces expensive BiCMOS chips and is working in production telecommunications equipment. It allows designers of high-speed telecommunications and networking systems to reduce overall system cost, size and power consumption.

The 20-Gbps throughput is achieved with 64 signals (32 inputs and 32 outputs), each communicating at a speed of 622 Mbps. The 0.35-micron gate array design contains 1.4 million transistors and forms the heart of an OC-192 public telecommunications system.

The key to the device's throughput capability lies in a high-performance current mode logic (CML) interface designed to operate at more than 850 Mbps. This technology also supports other high-speed interfaces, including 850 Mbps emitter coupled logic (ECL) type and 622 Mbps low voltage differential swing (LVDS). Supporting functions such as clock recovery and bit phase aligners are also available.

Integrating these high-performance interfaces eliminates the need for power-hungry and expensive gallium arsenide (GaAs), Bipolar or BiCMOS devices that historically have been required for high-speed interface applications. This integration capability also simplifies board design, resulting in significantly reduced system development costs.

First-pass design success was achieved with the device, and the well-established 0.35 micron process made the TGC4000 a very cost-effective solution.

TI offers even higher performance in its latest 0.18 micron TGC6000 ASIC. Interfaces capable of speeds up to 2.5 Gbps will be supported. Power consumption also will drop at least 70 percent in the core, leading to chip power dissipation savings of greater than 50 percent. The smaller size, higher speed and lower power of TI's 0.18 micron technology will save system costs by further reducing the number of chips required in a system.

TI is offering designers a TGC4000 test chip and test board to evaluate high-speed interfaces and macros in their system designs. TI has accepted design engagements and is executing designs using the TGC6000 technology.