InsideShowcase (Volume 25) is available in HTML and PDF format. - 191KBProgrammable dual DACs let designers trade power for speed New evaluation modules provide low cost, easy-to-use design platforms PCI2031: ACPI/PCI power management compliant PCI-to PCI bridge New options available on several UART devices TI, the USB "system solution" provider Fully compliant IrDA 1.1 solution 2.5-V Power managment for DSP systems A Cardbus system solution ideal for multimedia applications Wide input bandwidth 8-bit, 40-MSPS ADC CD now stands for changing DATA
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PCI2031: ACPI/PCI power management compliant PCI-to-PCI bridgeProduct Features
The PCI2031 is a PCI-to-PCI bridge device that adds ACPI/PCI power management compliance to the current high performance feature-rich solution for desktop PCs, PCI add-in cards, network servers and work stations. Taking advantage of pipelined FIFO architecture, the PCI2031 bursts at the maximum rate of 132 megabytes per second for 32-bit/33-MHz PCI buses. The PCI bus is typically limited to only four slots for add-in cards. In systems that require more than four PCI slots, one or more additional PCI buses are required. PCI-to-PCI bridges provide the interface between these extra buses. The bridges are also implemented on some multifunction add-in cards to buffer the electrical loading that the add-in card presents to the PCI bus. The PCI2031 conforms to all pertinent industry standards including ACPI/PCI power management, PCI bus specification (Version 2.1), PCI-to-PCI bridge specification (Version 1.0), and meets the requirements of Microsoft’s PC ’97 initiative. It also offers advanced features to meet future and emerging specifications, including the ability to support both logical and physical location addresses in complex PCI bus-based systems as well as exceeding the PCI specification for address decode windows. This device also has clock-run capability, as defined in the PCI Mobile Design Guide, that allows the device to dynamically adjust the speed of the PCI bus clock to conform with the operation conditions of the bus. The PCI2031 provides several other advantages to the portable PC market, including: support for both 5-V and 3.3-V signaling environments, buffering for electrical loading presented by the docking station to the PCI bus, and one of the eight GPIO pins that can be used to pass interrupts from devices on a docking station to the notebook PC. The PCI2031, like the earlier PCI2030, supports six programmable, low-skew buffered clocks for up to six secondary devices. These low skew clock outputs can be individually disabled to reduce power consumption. This device also has a serial EEPROM interface compliant with Microsoft PC ’97 and subtractive decoding which allow PCI systems to efficiently accommodate legacy ISA based boards. The PCI2031 is available in 176-pin TQFP packaging.
Vol 25 January, 1998 |
