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Finally! Chip technology matches designer imaginationBy Ray Simar, chief 'C6x architect 
Designers often tell us at Texas Instruments that they wish technology could keep pace with their imaginations. They dream up all sorts of handy gadgets and useful end equipments that they would like to create if only the silicon could support their ideas. With the introduction of TI's new family of TMS320C6x digital signal processors, designers of complex DSP-based systems get their wish. Those of us who developed the 'C6x went back to the drawing board to create breakthrough technology that will fuel the imaginations of designers for years to come. A combination of fortunate circumstance and creative thinking led to the development of the 'C6x family of devices. Advances in silicon process technology coupled with relatively new ways of looking at instruction sets and how processors use them allowed us to introduce products with 10 times the performance previously available in DSPs. Advanced silicon processSilicon process advances were critical, of course. Most DSPs on the market today rely on a 0.35-micron process, with two or three levels of metal. But TI's advanced technology allowed us to develop a device based on a 0.25-micron process with five levels of metal. The small feature size allows us to integrate a lot of stuff -- that's how I put it when 0.25-micron process first became available -- onto a single piece of silicon without increasing its size or power consumption. More layers of metal mean that we can pack components more tightly together. One result is that TI jumps from the single multiplier and one or two arithmetic logic units (ALUs) standard today to two multipliers and six ALUs on a single chip. This clears the way for designers to build more functionality into their systems or to operate parallel systems through a single DSP. Still, chip process improvements alone could not lead to the technological breakthrough that the 'C6x family represents. To get the incredible performance -- 1,600 MIPS -- possible with these new devices, we had to optimize instruction processing as well. New instruction schemesPipelining instructions was also part of the solution. This is not a new concept: TI has used a form of instruction pipelining in DSPs for years. But the 'C6x takes instruction pipelining to new levels, breaking multiplications into two steps for faster execution. This allows the processor to run at 200 MHz instead of the 60 MHz you are familiar with today. Our most important innovation, aside from the silicon process, was a major leap forward in Very Long Instruction Word (VLIW) methodology. Using VLIW allows eight instructions to feed eight functional units -- two multipliers and six ALUs -- simultaneously. Certain chip designs -- super-scalar architecture, for example -- accomplish some of this work in hardware. It is much simpler and more efficient, though, to do the job in software with VLIW. That's why other chip makers say they expect to develop VLIW designs by the end of the decade. TI was able to beat that timeline by a year or more because we developed a C compiler three times more efficient than what is typically found on a fixed-point DSP and also created the industry's first DSP assembly optimizer. These tools allow designers to take full advantage of the VLIW system without having to master a new language or work with assembly code. Endless design possibilitiesBrought together in a single device, these innovations and others that went into 'C6x development allow designers to create almost as much as they can imagine. Designers of modems, for example, can look beyond the current 57.6 Kbyte systems to products that can handle as much as 6 Mbytes of data over existing communications networks. Wireless system developers can start work on base stations small enough to mount on city light poles. Yes, I think that TI has come up with technology equal to designers' imaginations. And we expect to continue expanding the possibilities. TI's recently introduced TImeline technology, with its 0.18 micron (L effective) process, will permit us to build 'C6x devices capable of even greater performance at speeds of 300 MHz or more. Floating-point devices are on the horizon. We developed the 'C6x on the premise that, if we can cost-effectively provide the performance, designers will come up with all kinds of great new products. We are eager to see how far the design world can go.
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