Inside

• ADCs enable single chip solution from CCD output to digital domain
• New CD-based "Designer's Guide and Data Book" allow for powerful searches
• TI offers high-preformance total graphics solultion
• Programmable dual DACs let designers trade power for speed
• 10-Bit, 20 MSPS ADC provides high resolution and speed with 33% power savings
• Plug-N-Play platform provides easy evaluation of all TI audio power amplifiers
• 6 W stereo audio power amplifier in PowerPAD^TM package
• Three channel 1.75 W stereo audio power amplifier
• Fully integrated single channel PCMCIA power distribution switch
• High-speed 132 MBps PCI-to-PCI bridge
• RS-485 transceiver with integrated protection
• New amplifiers data book now available

High-speed 132 MBps PCI-to-PCI bridge

Product Features

• 132 Mbytes/sec burst performance
• Serial EEPROM interface
• Subtractive decode support
• Chasis Numbering/Slot Numbering
• Six low skew clock outputs

The PCI2030 PCI-to-PCI bridge device allows developers to take advantage of 132 megabytes per second (MB/s), maximum PCI bus performance and easily incorporate advanced capabilities to desktop personal computers, workstations, network servers, add-in cards and notebook docking stations. The PCI2030 device will interface two 32-bit PCI (Peripheral Component Interconnect) buses, providing functionality not found in systems with only one bus.

The PCI bus is typically limited to only four slots for add-in cards. In systems that require more than four PCI slots, one or more additional PCI buses are required. PCI-to-PCI bridges provide the interface between these extra buses. PCI-to-PCI bridges are also implemented on some multifunction add-in cards to buffer the electrical loading that the add-in card presents to the PCI bus.

The PCI2030 is compatible with either 3.3 V or 5 V PCI signaling environments. It implements the same high-performance pipelined FIFO architecture that has been used successfully in TI's other PCI interface chips. For portable PC users, this means increased bandwidth to simultaneously run multiple applications, such as high-speed network and video processing.

Besides complying fully with the current versions of the PCI specification (Version 2.1) and the PCI-to-PCI bridge specification (1.0), the PCI2030 offers advanced features to meet future versions of the PCI-to-PCI bridge specifications. One such feature simplifies the configuration of complex PCI-based systems by supporting both logical and physical location addresses.

The PCI2030 supports six programmable, low-skew buffered clocks for up to six secondary devices. The low skew of clock outputs give designers significant propagation skew margin. Unused clock outputs can be individually disabled to reduce power consumption.

The PCI2030 is the industry's only PCI bridge device that helps incorporate device masks and device type registers, which can be used to help designers meet the requirements of Microsoft’s^TM PC '97 specification for subsystem and vendor identification information. This eliminates the need to implement EEPROM memory for each device on an add-in card. The PCI2030 gives systems designers greater precision in their I/O and memory addressing schemes by providing two additional decode windows.

The PCI2030 is available in 176-pin TQFP packaging.