Texas Instruments

Mixed Signal & Analog Showcase
Blue Band
Mixed Signal & Analog Showcase Inside:
Showcase (Volume 29) is available in HTML and PDF format. - 330KB

Integrated shift register
    and 8-channel peripheral
    driver.
Intelligent quad high-side
    driver.
Class-D audio amplifier sets
    new standards in efficiency.
Programmable D/A allows
    for speed/power optimization.
Industry's first
    programmable resolution A/D.
High-speed 10-bit A/D with
    glueless DSP interface 90-mA
    loads
16-bit A/D D/A analog
    front-end.
UART provides quad-channel
    integration and 64-byte FIFO

Fully compliant 4-port
    USB hub.
USB power distribution
    features independant switches.
Dual low dropout regulator
    with integrated processor
    resets.
Programmable-sychronous buck
    regulator addresses advanced
    microprocessor power needs.
High performance DSP
    power controller
Low-voltage audio power amps
    designed for stero headphone
    applications.
SOT-23 50mA low-dropout
    regulator.
3-channel power supply
    supervisors.


TL16C754 UART provides quad-channel integration and 64-byte FIFO

Product features

  • Programmable 16- or 64-byte FIFOs
  • Selectable hardware and software flow control
  • High baud rate (up to 3.2 Mbps) n 3.3-V or 5-V supply
  • Programmable sleep mode
  • Characterized for operation from –40° C to 85° C

The TL16C754 is a four-channel universal asynchronous receiver/transmitter (UART) that provides serial-to-parallel data conversion from peripherals or modems and parallel-to-serial data conversion on data transmitted by the host. Applications include PCs, fax/modems, wireless systems, telecom equipment, or any application requiring an enhanced serial port.

The new device, which is pin-compatible with the TL16C554 quad UART, can be placed in an alternate mode (FIFO mode) relieving the processor of excessive software overhead by buffering received or transmitted characters. In addition, both the receiver and transmitter FIFOs can store up to 64 bytes, including three additional bits of error status per byte for the receiver FIFO. Primary outputs also allow for signaling of DMA transfers.

The new device, which is pin-compatible with the TL16C554 quad UART, can be placed in an alternate mode (FIFO mode) relieving the processor of excessive software overhead by buffering received or transmitted characters.

Another unique feature is selectable hardware and software flow control. Hardware flow control significantly reduces overhead and increases system efficiency by automatically controlling serial data flow using input and output signals. Software flow control automatically controls data flow using programmable Xon/Xoff characters.

The device provides quad-channel integration for reduced board space and cost. The complete status of each channel can be read at any time during functional operation by the processor. It also supports high data throughput of up to 3.2 Mbps (60-MHz input clock), and contains a software interface for modem control operations.

The TL16C754 is available in 80-pin TQFP and 68-pin PLCC packages.

TI&ME

Vol 29 November, 1998


How the TL16C754 works

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